參數(shù)資料
型號: GTL2002
廠商: NXP Semiconductors N.V.
英文描述: 2-bit bi-directional low voltage translator
中文描述: 2位雙向電壓轉(zhuǎn)換低
文件頁數(shù): 4/14頁
文件大?。?/td> 114K
代理商: GTL2002
Philips Semiconductors
Product data sheet
GTL2002
2-bit bi-directional low voltage translator
2004 Sep 29
4
APPLICATIONS
Bi-directional translation
For the bi-directional clamping configuration, higher voltage to lower voltage or lower voltage to higher voltage, the G
REF
input must be
connected to D
REF
and both pins pulled to HIGH side V
CC
through a pull-up resistor (typically 200 k
). A filter capacitor on D
REF
is
recommended. The processor output can be totem pole or open drain (pull-up resistors may be required) and the chipset output can be totem
pole or open drain (pull-up resistors are required to pull the Dn outputs to V
CC
). However, if either output is totem pole, data must be
uni-directional or the outputs must be 3-statable and the outputs must be controlled by some direction control mechanism to prevent
HIGH-to-LOW contentions in either direction. If both outputs are open drain, no direction control is needed. The opposite side of the reference
transistor (S
REF
) is connected to the processor core power supply voltage. When D
REF
is connected through a 200 k
resistor to a 3.3 V to
5.5 V V
CC
supply and S
REF
is set between 1.0 V to V
CC
– 1.5 V, the output of each Sn has a maximum output voltage equal to S
REF
and the
output of each Dn has a maximum output voltage equal to V
CC
.
1.8 V
GND
G
REF
S
REF
S1
S2
D1
D2
1.5 V
1.2 V
1.0 V
SA00642
GTL2002
V
CORE
CPU I/O
CHIPSET I/O
TOTEM POLE OR
OPEN DRAIN I/O
TYPICAL BI-DIRECTIONAL VOLTAGE TRANSLATION
5 V
V
CC
S5
Sn
D5
Dn
CHIPSET I/O
3.3 V
V
CC
D3
D4
S3
S4
INCREASE BIT
SIZE BY USING
10 BIT GTL2010 OR
22 BIT GTL2000
D
REF
200 k
Figure 4. Bi-directional translation to multiple higher voltage levels such as an I
2
C-bus application
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