參數(shù)資料
型號: GS9035
英文描述: GENLINX II Serial Digital Reclocker
中文描述: GENLINX二串行數(shù)字時(shí)鐘恢復(fù)器
文件頁數(shù): 4/10頁
文件大小: 705K
代理商: GS9035
GENNUM CORPORATION
521 - 96 - 07
4 of 10
G
PIN CONNECTIONS
GS9032
TOP VIEW
44 43 42 41 40 39 38 37 36 35 34
R
V
L
V
E
R
V
L
V
C
L
N
S
V
E
V
E
33
32
31
30
29
28
27
26
25
24
23
AUTO/MAN
BYPASS
R
SET1
V
EE
SDO1
SDO1
V
EE
SDO0
SDO0
V
EE
PD9
PD8
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
PCLKIN
1
2
3
4
5
6
7
8
9
10
11
12 13 14 15 16 17 18 19 20 21 22
V
C
V
E
2
C
O
R
S
S
S
S
L
V
E
S
V
C
RESET
PIN DESCRIPTIONS
NUMBER
SYMBOL
TYPE
DESCRIPTION
1-10
PD9 - PD0
I
CMOS or TTL compatible parallel data inputs. PD0 is the LSB and PD9 is the MSB.
11
PCLKIN
I
CMOS or TTL compatible parallel clock input.
12
V
EE3
-
Most negative power supply connection for parallel data and clock inputs.
13
V
CC3
-
Most positive power supply connection for parallel data and clock inputs.
14
C
OSC
I
Master Timer Capacitor. A capacitor should be added to decrease the system clock
frequency when an external capacitor is used across LF+ and LF- (NC if not used).
15, 16, 21
SS2, SS1, SS0
I
Data rate selection when in manual mode. These pins are not used in auto mode.
17
V
CC2
-
Most positive power supply connection for internal logic and digital circuits.
18
V
EE2
-
Most negative power supply connection for internal logic and digital circuits.
19
SDO1 ENABLE
I
Enable pin for the secondary cable driver (SDO1 and SDO1). Connect to most negative
power supply to enable. Leave open to disable (do NOT connect to V
CC
).
20
LOCK DET
O
TTL level which is high when the internal PLL is locked.
22
R
SET0
I
External resistor used to set the data output amplitude for SDO0 and SDO0.
23, 26, 29
V
EE
-
Most negative power supply connection for shielding (not connected).
24, 25
SDO0, SDO0
O
Primary, current mode, 75
cable driving output (inverse and true)
27, 28
SDO1, SDO1
O
Secondary, current mode, 75
cable driving output (inverse and true)
30
R
SET1
I
External resistor used to set the data output amplitude for SDO1 and SDO1.
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