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參數(shù)資料
| 型號： | GS8662S36BD-300I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 2M X 36 STANDARD SRAM, 0.45 ns, PBGA165 |
| 封裝： | 13 X 15 MM, 1 MM PITCH, MO-216CAB-1, FPBGA-165 |
| 文件頁數(shù)： | 8/37頁 |
| 文件大?。?/td> | 748K |
| 代理商： | GS8662S36BD-300I |
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Thermal Impedance
Package
Test PCB
Substrate
θ JA (C°/W)
Airflow = 0 m/s
θ JA (C°/W)
Airflow = 1 m/s
θ JA (C°/W)
Airflow = 2 m/s
θ JB (C°/W)
θ JC (C°/W)
165 BGA
4-layer
22.300
18.572
17.349
9.292
2.310
Notes:
1. Thermal Impedance data is based on a number of of samples from mulitple lots and should be viewed as a typical number.
2. Please refer to JEDEC standard JESD51-6.
3. The characteristics of the test fixture PCB influence reported thermal characteristics of the device. Be advised that a good thermal path to
the PCB can result in cooling or heating of the RAM depending on PCB temperature.
GS8662S08/09/18/36BD-400/350/333/300/250
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.02 3/2011
16/37
2011, GSI Technology
HSTL I/O DC Input Characteristics
Parameter
Symbol
Min
Max
Units
Notes
DC Input Logic High
VIH (dc)
VREF + 0.1
VDDQ + 0.3
mV
1
DC Input Logic Low
VIL (dc)
–0.3
VREF – 0.1
mV
1
Note:
Compatible with both 1.8 V and 1.5 V I/O drivers
HSTL I/O AC Input Characteristics
Parameter
Symbol
Min
Max
Units
Notes
AC Input Logic High
VIH (ac)
VREF + 0.2
—
mV
2,3
AC Input Logic Low
VIL (ac)
—
VREF – 0.2
mV
2,3
VREF Peak- to-Peak AC Voltage
VREF (ac)
—
5% VREF (DC)
mV
1
Notes:
1. The peak-to-peak AC component superimposed on VREF may not exceed 5% of the DC component of VREF..
2. To guarantee AC characteristics, VIH,VIL, Trise, and Tfall of inputs and clocks must be within 10% of each other.
3. For devices supplied with HSTL I/O input buffers. Compatible with both 1.8 V and 1.5 V I/O drivers.
20% tKHKH
VSS – 1.0 V
50%
VSS
VIH
Undershoot Measurement and Timing
Overshoot Measurement and Timing
20% tKHKH
VDD + 1.0 V
50%
VDD
VIL
Note:
Input Undershoot/Overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS8662S36BGD-300 | 2M X 36 STANDARD SRAM, 0.45 ns, PBGA165 |
| GS88036T-100T | 256K X 36 CACHE SRAM, 12 ns, PQFP100 |
| GS88037CT-250I | 256K X 36 CACHE SRAM, 2.3 ns, PQFP100 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8662S36BD-400 | 制造商:GSI Technology 功能描述:165 FBGA - Bulk |
| GS8662S36E-167 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Burst of 2 DDR SigmaSIO-II SRAM |
| GS8662S36E-167I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Burst of 2 DDR SigmaSIO-II SRAM |
| GS8662S36E-200 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Burst of 2 DDR SigmaSIO-II SRAM |
| GS8662S36E-200I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:72Mb Burst of 2 DDR SigmaSIO-II SRAM |
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