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參數(shù)資料
| 型號： | GS832236AB-300T |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 1M X 36 CACHE SRAM, PBGA119 |
| 封裝： | 14 X 22 MM, 1.27 MM PITCH, FPBGA-119 |
| 文件頁數(shù)： | 5/39頁 |
| 文件大小： | 827K |
| 代理商： | GS832236AB-300T |
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First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
WR
R
W
R
X
CR
R
CW
CR
W
CW
W
CW
Notes:
1. The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
2. Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
3. Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
GS832218/36A(B/D)-400/375/333/250/200/150
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00a 2/2011
13/39
2011, GSI Technology
Preliminary
Simplified State Diagram with G
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS832472GC-150I | 512K X 72 CACHE SRAM, 10 ns, PBGA209 |
| GS832472GC-250T | 512K X 72 CACHE SRAM, 6 ns, PBGA209 |
| GS8342D08E-333T | 4M X 8 STANDARD SRAM, 0.45 ns, PBGA165 |
| GS8342Q08AE-278 | 4M X 8 DDR SRAM, 0.45 ns, PBGA165 |
| GS84018AB-190 | 256K X 18 CACHE SRAM, 7.5 ns, PBGA119 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS832236AB-333 | 制造商:GSI Technology 功能描述:119 BGA - Bulk |
| GS832236AB-333I | 制造商:GSI Technology 功能描述:119 BGA - Bulk |
| GS832236AB-375 | 制造商:GSI Technology 功能描述:119 BGA - Bulk |
| GS832236AB-375I | 制造商:GSI Technology 功能描述:119 BGA - Bulk |
| GS832236AB-375M | 制造商:GSI Technology 功能描述:119 BGA - Bulk |
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