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參數(shù)資料
| 型號： | GS816272C-150T |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 256K X 72 CACHE SRAM, 7.5 ns, PBGA209 |
| 封裝： | 14 X 22 MM, 1 MM PITCH, BGA-209 |
| 文件頁數(shù)： | 30/31頁 |
| 文件大?。?/td> | 1583K |
| 代理商： | GS816272C-150T |
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N
ot
R
ec
om
m
en
de
d
fo
r
N
ew
D
es
ig
n—D
isc
on
tin
ue
d
Pr
od
uc
t
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
WR
R
W
R
X
CR
R
CW
CR
W
CW
W
CW
Notes:
1. The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
2. Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
3. Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
GS816272C
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.18 11/2005
8/31
1999, GSI Technology
Simplified State Diagram with G
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| GS816272C200 | 制造商:GSI 功能描述:New |
| GS816272CC-150 | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays |
| GS816272CC-150I | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 2.5V/3.3V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays |
| GS816272CC-150IV | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V/2.5V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays |
| GS816272CC-150V | 制造商:GSI Technology 功能描述:SRAM SYNC OCTAL 1.8V/2.5V 18MBIT 256KX72 7.5NS/3.8NS 209FBGA - Trays |
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