參數(shù)資料
型號(hào)： GS816236B-133IT
廠(chǎng)商： GSI TECHNOLOGY
元件分類(lèi)： SRAM
英文描述： 512K X 36 CACHE SRAM, 8.5 ns, PBGA119
封裝： FBGA-119
文件頁(yè)數(shù)： 20/38頁(yè)
文件大小： 1609K
代理商： GS816236B-133IT
ID Register Contents
Die
Revision
Code
Not Used
I/O
Configuration
GSI Technology
JEDEC Vendor
ID Code
Presence
Register
Bit # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0
x36
X X X X
0
X
1
0
1
0
1
0
0 0 1 1 0 1 1 0 0 1
1
x32
X X X X
0
1
0
0 0 1 1 0 1 1 0 0 1
1
x18
X X X X
0
X
1
0
1
0
1
0
1
0
0 0 1 1 0 1 1 0 0 1
1
x16
X X X X
0
1
0
0 0 1 1 0 1 1 0 0 1
1
GS816218(B/D)/GS816236(B/D)
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.18 11/2005
27/38
1999, GSI Technology
Tap Controller Instruction Set
Overview
There are two classes of instructions defined in the Standard 1149.1-1990; the standard (Public) instructions, and device specific
(Private) instructions. Some Public instructions are mandatory for 1149.1 compliance. Optional Public instructions must be
implemented in prescribed ways. The TAP on this device may be used to monitor all input and I/O pads, and can be used to load
address, data or control signals into the RAM or to preload the I/O buffers.
When the TAP controller is placed in Capture-IR state the two least significant bits of the instruction register are loaded with 01.
When the controller is moved to the Shift-IR state the Instruction Register is placed between TDI and TDO. In this state the desired
instruction is serially loaded through the TDI input (while the previous contents are shifted out at TDO). For all instructions, the
TAP executes newly loaded instructions only when the controller is moved to Update-IR state. The TAP instruction set for this
device is listed in the following table.
相關(guān)PDF資料
PDF描述
GS8162Z72AC-300 256K X 72 ZBT SRAM, 5 ns, PBGA209
GS8162ZV36BD-200IT 512K X 36 ZBT SRAM, 6.5 ns, PBGA165
GS8170DW72AC-250IT 256K X 72 STANDARD SRAM, 2.1 ns, PBGA209
GS8170DW72AGC-300IT 256K X 72 STANDARD SRAM, 1.8 ns, PBGA209
GS8182S18GBD-200I 1M X 18 DDR SRAM, 0.45 ns, PBGA165
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS816236BB-150 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 3.3V 18MBIT 512KX36 7.5NS/3.8NS 119FBGA - Trays
GS816236BB-150I 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 3.3V 18MBIT 512KX36 7.5NS/3.8NS 119FBGA - Trays
GS816236BB-150IV 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 18MBIT 512KX36 7.5NS/3.8NS 119FPBGA - Trays
GS816236BB-150V 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 2.5V/3.3V 18MBIT 512KX36 7.5NS/3.8NS 119FPBGA - Trays
GS816236BB-200 制造商:GSI Technology 功能描述:SRAM SYNC QUAD 3.3V 18MBIT 512KX36 6.5NS/3NS 119FBGA - Trays
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