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| 型號： | GS8161Z32BD-250I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 18Mb Pipelined and Flow Through Synchronous NBT SRAM |
| 中文描述： | 512K X 32 ZBT SRAM, 5.5 ns, PBGA165 |
| 封裝： | 13 X 15 MM, 1 MM PITCH, FBGA-165 |
| 文件頁數(shù)： | 20/37頁 |
| 文件大?。?/td> | 618K |
| 代理商： | GS8161Z32BD-250I |
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GS8161Z18B(T/D)/GS8161Z32B(D)/GS8161Z36B(T/D)
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.00 9/2004
20/37
2004, GSI Technology
Capacitance
(T
A
= 25
o
C, f = 1 MH
Z
, V
DD
= 2.5 V)
Note:
These parameters are sample tested.
AC Test Conditions
Parameter
Symbol
C
IN
C
I/O
Test conditions
V
IN
= 0 V
V
OUT
= 0 V
Typ.
Max.
Unit
Input Capacitance
4
5
pF
Input/Output Capacitance
6
7
pF
Parameter
Conditions
V
DD
– 0.2 V
0.2 V
1 V/ns
V
DD
/2
V
DDQ
/2
Fig. 1
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
Output load
Notes:
1.
2.
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted.
Device is deselected as defined by the Truth Table.
3.
50% tKC
V
SS
–
2.0 V
50%
V
SS
V
IH
Undershoot Measurement and Timing
Overshoot Measurement and Timing
50% tKC
V
DD
+ 2.0 V
50%
V
DD
V
IL
DQ
V
DDQ/2
50
30pF
*
Output Load 1
* Distributed Test Jig Capacitance
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