參數(shù)資料
型號(hào): GLT5160L16-10FJ
廠商: Electronic Theatre Controls, Inc.
英文描述: 16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM
中文描述: 1,600(2 -銀行甲524288字× 16位)同步DRAM
文件頁(yè)數(shù): 9/45頁(yè)
文件大?。?/td> 399K
代理商: GLT5160L16-10FJ
9
G-LINK Technology
DEC. 2003 (Rev.2.4)
Mode Register
Burst Length, Burst Type and CAS Latency can be programmed by
setting the mode register (MRS). The mode register stores these
data until the next MRS command, which may be issued when both
banks are in idle state. After t
RSC
from a MRS command, the
SDRAM is ready for new command.
CLK
CS
RAS
CAS
WE
BA, A[10:0]
BA
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
0
0
WBL
0
LTMODE
BT
BL
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
CL
CAS
R
R
2
3
R
R
R
R
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
BL
BT = 0
1
2
4
8
R
R
R
Full Page
BT = 1
1
2
4
8
R
R
R
R
1
SEQUENTIAL
INTERLEAVED
0
BURST
TYPE
BURST
LENGT
LATENC
Y MODE
Write Burst Length (WBL)
A9
1
Single bit (BL =
Length
= BL specified
CLK
Command
READ
Address
DQ
WRITE
Q0
Q1
Q3
Y
Q2
D0
D1
D3
D2
CAS
Burst Length
Burst Length
Y
Burst Type
Initial
Address
B
L
Column Addressing
A2
A1
A0
Sequential
Interleaved
0
0
0
8
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
0
0
1
1
2
3
4
5
6
7
0
1
0
3
2
5
4
7
6
0
1
0
2
3
4
5
6
7
0
1
2
3
0
1
6
7
4
5
0
1
1
3
4
5
6
7
0
1
2
3
2
1
0
7
6
5
4
1
0
0
4
5
6
7
0
1
2
3
4
5
6
7
0
1
2
3
1
0
1
5
6
7
0
1
2
3
4
5
4
7
6
1
0
3
2
1
1
0
6
7
0
1
2
3
4
5
6
7
4
5
2
3
0
1
1
1
1
7
0
1
2
3
4
5
6
7
6
5
4
3
2
1
0
0
0
4
0
1
2
3
0
1
2
3
0
1
1
2
3
0
1
0
3
2
1
0
2
3
0
1
2
3
0
1
1
1
3
0
1
2
3
2
1
0
0
2
0
1
0
1
1
1
0
1
0
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