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參數(shù)資料
| 型號： | GJRF400 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | SINGLE CHIP RF TRANSCEIVER |
| 中文描述： | 單芯片射頻收發(fā)器 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 117K |
| 代理商： | GJRF400 |
Gran-Jansen AS Oslo Norway
98-05
5
Rectifier
The receiver includes a half wave rectifier that rectifies
the analog signal in the I-channel and converts it to a
half wave rectified current that is available on the
RecOut pin (pin 44). The output current is
approximately 0.4
μ
A per mV of signal amplitude.As
the pick-up point of the block is after the VGA, the
signal at this pin indicates the internal level at a given gain
setting determined by the gain setting pins.
Tolerances in the order of
±
16 dB should be
expected.The bit RecSel selects the signal being rectified,
i.e. the output of the passive RC filter or the output of
the gyrator filter.
RecSel is bit no 51 in the control register.
Passive RC filter
Table 3: Cut off settings
Fc1
0
0
1
1
Fc0
0
1
0
1
fc (kHz)
40
85
120
200
The passive 2nd order RC filter protects the gyrator filter
from strong adjacent channel signals. The cut-off
frequency can be programmed to the frequencies in
table3.
Fcl is bit no 50 in the control register.
Fc0 is bit no 49 in the control register.
Gyrator filters
Table 4: Gyrator filter cut off settings
Rb
lp
(k
)
GmBias
fc
lowpass
(kHz)
11
14.5
21
30.5
47
84
91
62
30
20
13
6.8
0
0
0
1
1
1
The main receiver channel filter is a gyrator-capacitor
implementation of a five-pole elliptic lowpass filter.
The lowpass cut-off frequencies can be adjusted by
external resistors. Table 4 shows the cut-off frequency of
the gyrator filter as a function of bias resistor value. The
input signal amplitude should not exceed 100mVpp for
the gyrator filter to work properly. When BiasS = 1 the
gyrator filter in the I and the Q-channel uses the same
bias circuit. The external bias resistor Rblp must be
connected to pin Vb_lp1. When BiasS = 0 the lowpass
filters uses separate bias circuits. External resistors must
be connected to both Vb_lp1 and Vb_lp2. Resistor
connected to Vb_lp1 controls the cut-off frequency of
the I-channel lowpass filter.
GmBias is bit no 55 in the control register.
BiasS is bit no 53 in the control register.
Limiter
The limiter serves as a zero crossing detector, thus
removing amplitude variations in the IF signal, while
retaining only the phase variations. It consists of two
amplifier stages. The first is a non-inverting one which
needs an external capacitor to provide correct dc
levels. Its gain is approx. 23.5dB. Gain can be reduced
by adding a resistor in series with the capacitor. The
second stage has about 50dB gain. The limiter outputs
are ideally suited to measure the I-Q phase difference,
since its outputs are square waves with sharp edges.
Demodulator
The demodulator demodulates the I and Q channel
outputs and produces a digital data output. It detects
the relative phase difference of the I and the Q
channel signal. If the I channel signal lags the Q
channel, the FSK tone frequency lies above the LO
frequency (data ‘1’). If the I channel leads the Q
channel, the FSK tone lies below the LO frequency
(data ‘0’). The output of the receiver is available on the
Data IXO pin.
The output of the demodulator is filtered by a first order
RC lowpass filter (internal resistor R=100k
and external
capacitor, pin 22) and then amplified by a Schmitt trigger
to produce clean data output. The bandwidth of the filter
must be adjusted to the bitrate.
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