Ver: 2.4
May 23, 2003
TEL: 886-3-5788833
http://www.gmt.com.tw
10
G767
Global Mixed-mode Technology Inc.
The Alert Response can activate several different
slave devices simultaneously, similar to the SMBus
General Call. If more than one slave attempts to re-
spond, bus arbitration rules apply, and the device with
the lower address code wins. The losing device does
not generate an acknowledge and continues to hold
the ALERT line low until serviced (implies that the
host interrupt input is level-sensitive). Successful
reading of the alert response address clears the inter-
rupt latch.
Command Byte Functions
The 8-bit command byte register (Table 4) is the mas-
ter index that points to the various other registers
within the G767. The register’s POR state is 0000
0000, so that a Receive Byte transmission (a protocol
that lacks the command byte) that occurs immediately
after POR returns the current local temperature data.
The one-shot command immediately forces a new
conversion cycle to begin. In software standby mode
(RUN/STOP bit = high), a new conversion is begun,
after which the device returns to standby mode. If a
conversion is in progress when a one-shot command
is received in auto-convert mode (RUN/STOP bit = low)
between conversions, a new conversion begins, the
conversion rate timer is reset, and the next automatic
conversion takes place after a full delay elapses.
Configuration Byte Functions
The configuration byte register (Table 5) is used to
mask (disable) interrupts and to put the device in
software standby mode. The lower six bits are inter-
nally set to (XX1111), making them “don’t care” bits.
Write zeros to these bits. This register’s contents can
be read back over the serial interface.
Status Byte Functions
The status byte register (Table 6) indicates which (if
any) temperature thresholds have been exceeded.
This byte also indicates whether or not the ADC is
converting and whether there is an open circuit in the
remote diode DXP-DXN path. After POR, the normal
state of all the flag bits is zero, assuming none of the
alarm conditions are present. The status byte is
cleared by any successful read of the status, unless
the fault persists. Note that the ALERT interrupt
latch is not automatically cleared when the status flag
bit is cleared.
When reading the status byte, you must check for in-
ternal bus collisions caused by asynchronous ADC
timing, or else disable the ADC prior to reading the
status byte (via the RUN/STOP bit in the configuration
byte). In one-shot mode, read the status byte only af-
ter the conversion is complete, which is 150ms max
after the one-shot conversion is commanded.
Table 5. Configuration-Byte Bit Assignments
BIT
7 (MSB)
NAME
MASK
RUN /
STOP
RFU
POR STATE
0
FUNCTION
Masks all
ALERT
interrupts when high.
Standby mode control bit. If high, the device immediately stops converting and en-
ters standby mode. If low, the device converts in either one-shot or timer mode.
Reserved for future use
6
0
5-0
0
Table 6. Status-Byte Bit Assignments
BIT
7 (MSB)
6
5
4
3
2
1
0 (LSB)
*These flags stay high until cleared by POR, or until the status byte register is read.
NAME
BUSY
LHIGH*
LLOW*
RHIGH*
RLOW*
OPEN*
RFU
RFU
FUNCTION
A high indicates that the ADC is busy converting.
A high indicates that the local high-temperature alarm has activated.
A high indicates that the local low-temperature alarm has activated.
A high indicates that the remote high-temperature alarm has activated.
A high indicates that the remote low-temperature alarm has activated.
A high indicates a remote-diode continuity (open-circuit) fault.
Reserved for future use (returns 0)
Reserved for future use (returns 0)