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參數(shù)資料
| 型號(hào)： | FSD1000 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Combo Fairchild Power Switch (FPS) |
| 中文描述： | 1.2 A SWITCHING REGULATOR, 73 kHz SWITCHING FREQ-MAX, PDIP12 |
| 封裝： | HEAT SINK/SLUG, DIP-12 |
| 文件頁數(shù)： | 1/20頁 |
| 文件大?。?/td> | 375K |
| 代理商： | FSD1000 |
2004 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev.1.0.2
Features
Current Mode Control for Main Power
Voltage Mode Control for Auxiliary Power
Synchronized switching of Main and Auxiliary Power
(70kHz)
Internal Start-up Circuit
Internal Soft Start for Auxiliary Power
User Defined Soft Start for Main Power
Pulse by Pulse Current Limiting
Over Load Protection (Main : Latch Mode, Aux : Auto
Restart Mode)
Internal Over Temperature Protection
Vcc Under Voltage Lockout
Line Under voltage/ Over Voltage Lockout
Burst Mode Operation for auxiliary power to reduce the
Power Consumption in the Standby Mode
Internal High Voltage SenseFET for auxiliary power
Application
SMPS for PC power
LCD TV Power Supply
Description
FSD1000 is a Fairchild Power Switch (FPS) that is specially
designed for SMPS of personal computer. This device is a
high voltage power SenseFET combined with two PWM
controllers in a single monolithic device; One is for main power
and the other is for auxiliary power. The PWM controllers
feature integrated oscillator, under voltage lockout,
optimized gate driver and temperature compensated precise
current sources for the loop compensation. This device also
includes various fault protection circuits such as line under/
over voltage lock out, over voltage protection, over load
protection and over temperature protection. Compared with
discrete MOSFET and PWM controller solution, FSD1000
can reduce total cost, component count, size and weight
simultaneously increasing efficiency, productivity and
system reliability
Typical Circuit
FS D1000
Combo Fairchild Power S w itch (FPS
T M
)
Figure 1. Typical Application circuit
Vcc
Main Output
Main
PWM
V
FB.main
AC
IN
Aux
PWM
V
FB.aux
Aux Output
Main Off
LS1
LS2
V
STR
Output
I
sense
Drain
GND
I
LIM
S/S
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