參數資料
型號: FS8160
廠商: Electronic Theatre Controls, Inc.
英文描述: 1.1 GHz/1.1 GHz Dual Phase-locked Loop IC
中文描述: 1.1 GHz/1.1 GHz雙鎖相環(huán)集成電路
文件頁數: 11/13頁
文件大?。?/td> 257K
代理商: FS8160
FS8160
Page 11
April 2003
Lock Detector
The lock detector incorporates a filter which compares the phase error between the inputs
to the PFD to an R-C generated delay of 15 ns. To enter the locked state (output is high),
the phase error must be less than 15 ns for four (4) consecutive cycles. Once in the locked
state, the generated R-C delay is changed to 30 ns. To exit the locked state (i.e. lock detec-
tor output goes low), the phase error must become greater than the 30 ns delay. When the
PLL is in stand-by mode, the lock detector output is forced low. A flow chart representing
the operation of the lock detector is given below.
Crystal Oscillator
The internal crystal oscillator circuitry may be used in either of two modes: crystal mode
— with an external crystal resonator (crystal mode) or logic mode — with an external ref-
erence frequency source such as a TCXO (logic mode). The FOLD[3:0] control bits select
Start
Phase error
< 15 ns
Phase error
< 15 ns
Yes
Phase error
< 15 ns
Phase error
< 15 ns
Yes
Yes
Yes
Locked state
(output HIGH)
Phase error
> 30 ns
Un-locked state
(output LOW)
No
No
No
No
No
Yes
相關PDF資料
PDF描述
FS8853-13PI 300mA LDO Linear Regulator
FS8853-18CA 300mA LDO Linear Regulator
FS8853-18CB 300mA LDO Linear Regulator
FS8853-18CC 300mA LDO Linear Regulator
FS8853-18CD 300mA LDO Linear Regulator
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