![](http://datasheet.mmic.net.cn/370000/FS6217-01_datasheet_16690025/FS6217-01_1.png)
AMERICAN MICROSYSTEMS, INC.
April 2000
This document contains information on a product under development. American Microsystems, Inc. reserves the right to change or discontinue this product without notice.
ISO9001
4.18.00
FS6217-01
Dual PLL Clock Generator IC
Advance Information
1.0 Features
27MHz master clock input
Generated audio system clocks
SCKO1 : 33.8688MHz (fixed)
SCKO2 : 256 x F
s
SCKO3 : 384 x F
s
SCKO4 : 768 x F
s
Zero ppm synthesis error on all output clocks
Low cycle-to-cycle and cumulative clock jitter
Multiple sampling frequencies:
Fs = 32, 44.1, 48, 64, 88.2, and 96KHz
(@ 256x, 384x, and 768x F
s
)
Fs = 128, 176.4, and 192KHz
(@ 256x and 384x F
s
)
Backward-compatible with PLL1700
3.3V logic interface
Dual power supplies: +5v and +3.3v
(contact factory for +3.3 volt only version)
Small package: 20 pin SSOP (5.3mm)
Custom frequency patterns and packages are avail-
able. Contact your local AMI Sales Representative for
more information.
2.0 Description
The FS6217-01 is a CMOS clock generator IC designed
to minimize cost and component count in digital video/
audio systems.
The FS6217-01 can generate four system clocks from a
single 27MHz reference frequency.
This device eliminates external components and provides
the low phase jitter performance needed for high-
performance digital-to-analog converters (DAC) and
analog-to-digital converters (ADC).
The FS6217-01 is ideal for MPEG-2 applications which
use a 27MHz master clock such as: DVD players, DVD
add-on cards for multimedia PCs, digital HDTV systems,
and set-top boxes.
Figure 1: Pin Configuration
1
16
2
3
4
5
6
7
8
15
14
13
12
11
ML/SR0
MODE
VDD
GND
XT2
GNDP
VDDP
MCKON
SCKO1
SCKO4
SCKO2
GNDB
VDDB
FS6217-01
9
10
SR1
MCKOP
18
17
SCKO3
RST
20
19
MD/FS0
MC/FS1
XT1
20-pin SSOP (5.3mm)
Figure 2: Block Diagram
XT2
XT1
SCKO3
SCKO4
MCKOP
MCKON
SCKO1
SCKO2
10
Reset
Logic
PLL1
PLL2
Shift
Register
MODE
Dividers
&
Switching
FS6217-01
RST
Look-Up
Table
11
12
14
17
13
6
5
1
20
19
2
18
MD/FS0
MC/FS1
ML/SR0
SR1
9