參數資料
型號: FDFS2P103
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: Integrated P-Channel PowerTrench MOSFET and Schottky Diode
中文描述: 5.3 A, 30 V, 0.059 ohm, P-CHANNEL, Si, POWER, MOSFET
封裝: SOIC-8
文件頁數: 2/5頁
文件大?。?/td> 87K
代理商: FDFS2P103
F
FDFS2P102 Rev. E
Electrical Characteristics
T
A
= 25 C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
I
DSS
Zero Gate Voltage Drain Current
V
GS
= 0 V, I
D
= -250
μ
A
V
DS
= - 16 V,
V
GS
= 0 V
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
-20
V
μ
A
-1
-10
100
-100
T
J
= 55
°
C
I
GSSF
I
GSSR
Gate-Body Forward Leakage
Gate-Body Reverse Leakage
nA
nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage
R
DS(on)
Static Drain-Source On-Resistance
V
DS
= V
GS
, I
D
= -250
μ
A
V
GS
= -10 V, I
D
= -3.3 A
V
GS
= -4.5 V, I
D
= -2.5 A
V
GS
= -10 V, V
DS
= -5 V
V
DS
= -10 V, I
D
= -3.3 A
-1
-1.4
0.100
0.167
-2
V
0.125
0.2
I
D(on)
g
FS
On-State Drain Current
Forward Transconductance
-10
A
S
5
Dynamic Characteristics
C
iss
Input Capacitance
C
oss
Output Capacitance
C
rss
Reverse Transfer Capacitance
270
150
45
pF
pF
pF
V
DS
= -10 V, V
GS
= 0 V,
f = 1.0 MHz
Switching Characteristics
(Note 2)
t
d(on)
Turn-On Delay Time
t
r
Turn-On Rise Time
t
d(off)
Turn-Off Delay Time
t
f
Turn-Off Fall Time
Q
g
Total Gate Charge
8
7
17
10
7
16
14
27
1.8
10
ns
ns
ns
ns
nC
V
DD
= -15 V, I
D
= -1 A,
V
GS
= -10 V, R
GEN
= 6
V
DS
= -5 V, I
D
= -3.3 A,
V
GS
= -10 V,
Drain-Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain-Source Diode Forward Current
V
SD
Drain-Source Diode Forward Voltage
-1.3
-1.2
A
V
V
GS
= 0 V, I
S
= -1.3 A
(Note 2)
-0.8
Schottky Diode Characteristics
I
R
Reverse Leakage
T
J
= 25
°
C
T
J
= 125
°
C
T
J
= 25
°
C
T
J
= 125
°
C
T
J
= 25
°
C
T
J
= 125
°
C
250
18
0.47
0.39
0.58
0.53
uA
mA
V
V
R
= 20 V
V
F
Forward Voltage
I
F
= 1 A
I
F
= 2 A
Thermal Characteristics
R
JA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
R
JC
Thermal Resistance, Junction-to-Case
(Note 1)
78
40
Notes:
1:
R
θ
JA
is the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface
of the drain pins. R
θ
JC
is guaranteed by design while R
θ
CA
is determined by the user's board design.
Scale 1 : 1 on letter size paper
2:
Pulse Test: Pulse Width
300
μ
s, Duty Cycle
2.0%
a) 50
°
C/W when
mounted on a 1 in
2
pad of 2 oz. copper.
b) 105
°
C/W when
mounted on a 0.04 in
2
pad of 2 oz. copper.
c) 125
°
C/W when
mounted on a minimum
pad.
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相關代理商/技術參數
參數描述
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