參數資料
型號: FBL2041I
廠商: NXP Semiconductors N.V.
英文描述: 3.3V BTL 7-bit Futurebus transceiver standard A-port
中文描述: 3.3橋接7位Futurebus收發(fā)器標準A端口
文件頁數: 8/12頁
文件大小: 94K
代理商: FBL2041I
Philips Semiconductors
Product specification
FBL2041
FBL2041I
3.3V BTL 7-bit Futurebus+ transceiver (standard A-port)
1999 Apr 27
8
AC ELECTRICAL CHARACTERISTICS
A PORT LIMITS
TEST
T
amb
= +25
°
C,
cc
= 3.3V,
C
L
= 50pf, R
L
= 500
FBL2041
COMMERCIAL
T
amb
= 0 to +70
°
C,
V
CC
= 3.3V
±
10%,
C
L
= 50pF, R
L
= 500
MIN
FBL2041I
INDUSTRIAL
T
amb
= –40 to +85
°
C,
V
CC
= 3.3V
±
10%,
C
L
= 50pF, R
L
= 500
MIN
SYMBOL
PARAMETER
CONDITION
,
UNIT
MIN
TYP
MAX
MAX
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay,
Bn to AOn
Output enable time,
OEA to AOn
Output disable time,
OEA to AOn
Transition time, AOn Port
(10% to 90%
or 90% to 10%)
Waveform 1, 2
3.9
4.0
5.3
2.4
3.5
2.3
4.8
4.9
6.6
4.4
4.8
3.1
5.8
6.0
8.0
8.0
6.0
3.9
3.7
3.8
5.0
2.1
3.4
2.2
6.4
6.7
8.6
8.5
6.5
4.3
2.8
2.7
4.5
1.1
2.7
1.4
6.9
7.0
9.0
9.0
7.0
4.7
ns
Waveform 4, 5
ns
Waveform 4, 5
ns
t
TLH
t
THL
Test Circuit
and Waveforms
0.7
0.5
1.8
1.6
3.0
2.0
0.7
0.5
3.0
2.0
0.7
0.5
3.0
2.0
ns
t
SK
(o)
Output skew between
receivers in same
package
1
Waveform 3
0.7
1.5
1.5
1.5
ns
B PORT LIMITS
T
amb
= 0 to +70
°
C,
V
CC
= 3.3V
±
10%,
C
D
U
= 9
2.9
2.5
3.6
3.1
3.9
2.6
1.2
0.4
SYMBOL
PARAMETER
TEST
CONDITION
T
amb
= +25
°
C,
V
= 3.3V,
C
D
= 30pF, R
U
= 9
3.3
2.7
3.5
4.0
3.4
4.3
4.2
2.9
3.8
1.2
0.4
0.9
T
amb
= –40 to +85
°
C,
V
CC
= 3.3V
±
10%,
C
D
U
= 9
1.8
1.7
2.8
2.5
2.9
1.9
1.2
0.4
UNIT
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
TLH
t
THL
Propagation delay,
AIn to Bn
Enable/disable time,
OEB0 to Bn
Enable/disable time,
OEB1 to Bn
Transition time, Bn Port
(1.3V to 1.8V)
Output skew between
drivers in same package
1
Waveform 1, 2
4.2
5.2
4.5
5.8
5.3
6.1
4.7
3.0
1.5
6.0
5.0
6.6
6.0
6.9
5.5
3.0
1.5
6.7
5.6
7.1
6.4
7.3
6.0
3.0
1.5
ns
Waveform 2
4.9
ns
Waveform 1
5.1
ns
Test Circuit
and Waveforms
2.4
ns
t
SK
(o)
Waveform 3
1.5
1.5
1.5
ns
SYMBOL
PARAMETER
TEST
CONDITION
R
U
= 16.5
R
U
= 16.5
R
U
= 16.5
UNIT
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
TLH
t
THL
Propagation delay,
AIn to Bn
Enable/disable time,
OEB0 to Bn
Enable/disable time,
OEB1 to Bn
Transition time, Bn Port
(1.3V to 1.8V)
Output skew between
drivers in same package
1
Waveform 1, 2
3.3
2.7
4.0
3.4
4.2
2.9
1.2
0.4
4.2
3.6
4.9
4.3
5.1
3.8
2.4
0.9
5.1
4.5
5.8
5.3
6.1
4.7
3.0
1.5
3.0
2.5
3.6
3.1
3.9
2.6
1.2
0.4
6.0
5.0
6.6
6.0
6.8
5.5
3.0
1.5
1.8
1.7
2.7
2.5
3.0
1.9
1.2
0.4
6.7
5.6
7.1
6.4
7.3
6.0
3.0
1.5
ns
Waveform 2
ns
Waveform 1
ns
Test Circuit
and Waveforms
ns
t
SK
(o)
Waveform 3
1.5
1.5
1.5
ns
NOTES:
1.
t
actual – t
actual
for any data input to output path compared to any other data input to output path where N and M are either LH or
HL. Skew times are valid only under same test conditions (temperature, V
CC
, loading, etc.).
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