參數(shù)資料
型號: FAN7930BM
廠商: Fairchild Semiconductor
文件頁數(shù): 15/22頁
文件大?。?/td> 1849K
描述: IC PFC CTLR CRITICAL CONF 8-SOIC
標準包裝: 95
模式: 臨界傳導(CRM)
頻率 - 開關: 250kHz ~ 350kHz
電流 - 啟動: 120µA
電源電壓: 13 V ~ 20 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 8-SOP
包裝: 管件
 
?2010 Fairchild Semiconductor Corporation
 
www.fairchildsemi.com
FAN7930B " Rev. 1.0.3
15
 
9. THD Optimization: Total harmonic distortion (THD) 
is the factor that dictates how closely input current
shape matches sinusoidal form. The turn-on time of the
PFC controller is almost constant over one AC line
period due to the extremely low feedback control
response. The turn-off time is determined by the current
decrease slope of the boost inductor made by the input
voltage   and   output   voltage.   Once   inductor   current
becomes zero, resonance between C
OSS
 and the boost 
inductor makes oscillating waveforms at the drain pin
and auxiliary winding. By checking the auxiliary winding
voltage through the ZCD pin, the controller can check
the zero current of boost inductor. At the same time, a
minor delay is inserted to determine the valley position
of drain voltage. The input and output voltage difference
is at its maximum at the zero cross point of AC input
voltage. The current decrease slope is steep near the
zero cross region and more negative inductor current
flows during a drain voltage valley detection time. Such
a negative inductor current cancels down the positive
current flows and input current becomes zero, called
zero-cross distortion in PFC.
1. 5 V
1 5 0 n s
1 . 4 V
O N
V
ZC   D
I
I N   D   U   C   T  O   R
M O S F E T G a t e
I
N  E  G  A  T  I V  E
O N
I
I N
I
M  O  S  F  E  T
I
D  I O  D  E
 
Figure 37.    Input and Output Current
Near Input Voltage Peak
1 . 5 V
1 5 0 n s
1 . 4 V
O N
O N
V
Z  C   D
I
I N   D   U   C   T  O   R
M  O S F E T G a t e
I
N  E  G  A  T  I V  E
O N
O N
I
I N
 
Figure 38.    Input and Output Current Near
Input Voltage Peak Zero Cross
To improve this, lengthened turn-on time near the zero
cross region is a well-known technique, though the
method may vary and may be proprietary. FAN7930B
optimizes this by sourcing current through the ZCD pin.
Auxiliary winding voltage becomes negative when the
MOSFET turns on and is proportional to input voltage. 
The negative clamping circuit of ZCD outputs the
current to maintain the ZCD voltage at a fixed value.
The   sourcing   current   from   the   ZCD   is   directly
proportional to the input voltage. Some portion of this
current is applied to the internal sawtooth generator
together with a fixed-current source. Theoretically the
fixed-current source and the capacitor at sawtooth
generator determine the maximum turn-on time when no
current is sourcing at ZCD clamp circuit and available
turn-on time gets shorter proportional to the ZCD
sourcing current.
R
Z C D
V
A U X
Z C D
Z e r o C u r r e n t
D e t e c t
5
V  CC
N
1
V  R E F
I M  O T
re s e t
S a w t o o t h G e n e r a t o r
C  M  O T
T H D O p tim iz e r
 
Figure 39.    Circuit of THD Optimizer
V
Z C D
t
ON
t
V
Z C D
 a t F E T o n
t
O N
 g e t s h o r tte r
t
O N
 n o t s h o r tte r
t
O N
 is ty p ic a lly c o n s ta n t o v e r 1 A C lin e fr e q u e n c y
b u t t
O N
 is c h a n g e d b y Z C D v o lta g e .
 
Figure 40.    Effect of THD Optimizer
By THD optimizer, turn-on time over one AC line period
is proportionally changed, depending on input voltage.
Near zero cross, lengthened turn-on time improves
THD performance.
 
 
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