?2010 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FAN7930B " Rev. 1.0.3
12
Since the two OVP conditions are quite different,
protection recovering mode is different. Once the first
OVP triggers, switching stops immediately and recovers
switching when the output voltage is decreased with a
hysteresis. When the second OVP triggers, switching
can be recovered only when the V
CC
supply voltage falls
below V
STOP
and builds up higher than V
START
again and
V
OVP
should be lower than hysteresis. If the second
OVP is not used, the OVP pin must be connected to the
INV pin or to the ground.
V
C C
V
I N   V
V
O   V   P
I
M   O   S   F   E   T
t
IN  V   O  V  P  
L e v e l
h y s t e r e s i s
S  w  i t c h i n g s t o p
o n l y d u r i n g
O  V  P
E r r o r o n I N  V  
R  e s i s t o r s
H  a p p e n s
O  V  P   L e v e l
V
ST  O   P
V
S  T  A  R  T
S  w  i t c h i n g s t o p
u n t i l V    C  C d r o p s
b e l o w   V
S  T  O   P
a n d
r e c o v e r s t o
V    S  T  A  R  T
I f e r r o r
s t i l l e x i s t ,
O  V  P  
t r i g g e r s
a g a i n
O  V  P   L e v e l
T  h o u g h O  u t p u t -
V  o l t a g e R  e d u c e d ,
n o S  w  i t c h i n g .
Figure 25.    Comparison of First and Second
OVP Recovery Modes
4. Control Range Compensation: On time is controlled
by the output voltage compensator with FAN7930B. Due
to this when input voltage is high and load is light,
control range becomes narrow compared to when input
voltage is low. That control range decrease is inversely
proportional to the double square of the input voltage
(  control range
1
input voltage
2
).   Thus   at   high   line,
unwanted burst operation easily happens at light load
and audible noise may be generated from the boost
inductor or inductor at input filter. Different from the
other converters, burst operation in PFC block is not
needed   because   the   PFC   block   itself   is   normally
disabled during standby mode. To reduce unwanted
burst operation at light load, an internal control range
compensation function is implemented and shows no
burst operation until 5% load at high line.
5.   Zero-Current   Detection:   Zero-current   detection
(ZCD) generates the turn-on signal of the MOSFET
when the boost inductor current reaches zero using an
auxiliary winding coupled with the inductor. When the
power switch turns on, negative voltage is induced at the
auxiliary winding due to the opposite winding direction
(see   Equation   1).   Positive   voltage   is   induced   (see
Equation 2) when the power switch turns off:
AC
IND
AUX
AUX
V
T
T
?/DIV>
-
=
(1)
(
)
AC
PFCOUT
IND
AUX
AUX
V
V
T
T
-
?/DIV>
=
(2)
where V
AUX
is the auxiliary winding voltage; T
IND
and T
AUX
are boost inductor turns and auxiliary winding turns,
respectively; V
AC
is input voltage for PFC converter; and
V
OUT_PFC
is output voltage from the PFC converter.
P  F  C   I n  d  u  c  t o  r
A  u  x  . W   i n  d  i n  g
V
IN
P   F  C
V
O   U   T
P   F  C
Z  C  D
V
TH  ( Z  C  D  )
+
-
V   C  C
T   H   D   
O   p  t i m   i z  e  d  
S   a  w   t o  o  t h  
G   e  n  e  r a  t o  r
R   e  s  t a  r t
T   i m   e  r
G  a  t e
D  r i v  e  r
R
Z  C   D
C
Z  C   D
N  e g a t i v e C  l a m  p
C  i r c u i t
P  o s i t i v e C  l a m  p
C  i r c u i t
5
S
Q
R
Q
f M  A  X
L  i m   i t
O  p t i o n a l
Figure 26.    Circuit Near ZCD
Because auxiliary winding voltage can swing from
negative to positive voltage, the internal block in ZCD
pin has both positive and negative voltage clamping
circuits. When the auxiliary voltage is negative, an
internal circuit clamps the negative voltage at the ZCD
pin around 0.65 V by sourcing current to the serial
resistor between the ZCD pin and the auxiliary winding.
When the auxiliary voltage is higher than 6.5 V, current
is sinked through a resistor from the auxiliary winding to
the ZCD pin.
I
SW
V
A   U   X
&   V
Z   C   D
V
A  C   I N
I
M   O   S  F  E  T
I  D   I O   D   E
V    A  U   X
V
Z  C   D
t
6  . 2  V
0  . 6  5  V
Figure 27.    Auxiliary Voltage Depends
on MOSFET Switching
The auxiliary winding voltage is used to check the boost
inductor current zero instance. When boost inductor
current becomes zero, there is a resonance between
boost inductor and all capacitors at the MOSFET drain
pin,   including   C
OSS
  of   the   MOSFET;   an   external
capacitor at the D-S pin to reduce the voltage rising and
falling slope of the MOSFET; a parasitic capacitor at
inductor; and so on to improve performance. Resonated
voltage is reflected to the auxiliary winding and can be
used for detecting zero current of boost inductor and
valley position of MOSFET voltage stress. For valley
detection, a minor delay by the resistor and capacitor is
needed. A capacitor increases the noise immunity at the
ZCD pin. If ZCD voltage is higher than 1.5 V, an internal
ZCD comparator output becomes HIGH and LOW when
the ZCD goes below 1.4 V. At the falling edge of
comparator output, internal logic turns on the MOSFET.
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