參數(shù)資料
型號: FA3647P
廠商: FUJI ELECTRIC CO LTD
元件分類: 穩(wěn)壓器
英文描述: PWM control IC with light load power saving function For Switching Power Supply Control
中文描述: 1 A SWITCHING CONTROLLER, 500 kHz SWITCHING FREQ-MAX, PDIP8
封裝: DIP-8
文件頁數(shù): 8/21頁
文件大小: 406K
代理商: FA3647P
FA3641P(N), FA3647P(N)
65
Fig. 1 Oscillator
Fig. 2 Oscillator output
Fig. 3 Oscillation frequency
I
Description of each circuit
1. Oscillator
The oscillator generates a triangular waveform by charging and
discharging the built-in capacitor. A desired oscillation
frequency can be set by the value of the resistor connected to
the RT pin (See Figure 1).
The built-in capacitor voltage oscillates between about 3V and
1V, with almost the same charging and discharging gradients
(Figure 2). You can set the desired oscillation frequency by
changing the gradients using the resistor connected to the RT
pin. (Large Rt = low frequency, small Rt = high frequency) The
oscillation frequency is automatically lowered when output duty
cycle is small (FB about 1.18V) in light load mode. For more
information, see item 2,
Reducing oscillation frequency circuit
in light-load mode.
The relationship between Rt and the fixed oscillation frequency
is approximately given by:
4880
Rt + 1.4
..................................................... (1)
.......................................... (2)
f
O
: Fixed frequency [kHz]
Rt:Timing resistance [k
]
The oscillator waveform cannot be observed from the
outside because a pin for this purpose is not provided.
The oscillator output is connected to a PWM comparator.
The RT pin is 2.5V DC in normal fixed frequency operation
mode. When the frequency is lowered, the voltage also
decreases linearly to about 1V.
2. Reducing oscillation frequency circuit in light-load mode
To reduce the loss of the power supply in standby mode, this
IC has a feature that automatically lowers the oscillation
frequency when the load is light. When the load is light, with
the result that the IC output pulse width narrows below about
10% and the FB pin voltage decreases below about 1.18V,
the oscillation frequency begins to decreases linearly until
the output pulse width becomes 0. When the output pulse
width is 0, the oscillation frequency is about 46% of normal
fixed frequency (Figure 3). Even while the oscillation
frequency is decreasing, the built-in capacitor voltage
oscillates between about 3V and 1V.
The frequency reduction rate (46%) can be adjusted from
the outside. (See
Design advice
for more information.)
3. PWM comparator
The PWM comparator has four inputs as shown in Figure 4.
Oscillator output
is compared with CS pin voltage
pin voltage
, and DT voltage
,
, and
has priority and is compared with output
While the voltage is lower than the oscillator output, the
comparator output is high. While the voltage is higher than
the oscillator output, the PWM comparator output is low (see
Figure 5). The IC OUT pin voltage is high while the PWM
comparator output is low.
When the IC is powered up, CS pin voltage
start operation. The output pulse then begins to widen
gradually. During normal operation, the output pulse width is
determined within the maximum duty cycle (70%) set by DT
voltage
under the condition set by FB pin voltage
stabilize the output voltage.
, FB
. The lowest of three inputs
.
controls soft
, to
Fig. 4 PWM comparator
Fig. 5 PWM comparator timing chart
Rt [k
]
4880
1.4
f
0
f
0
[kHz]
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