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參數(shù)資料
型號: EVAL-ADCMP573BCPZ
廠商: Analog Devices Inc
文件頁數(shù): 4/16頁
文件大?。?/td> 0K
描述: BOARD EVALUATION ADCMP573BCP
標準包裝: 1
主要目的: 接口,比較器
已用 IC / 零件: ADCMP573
已供物品:
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ADCMP572/ADCMP573
Rev. A | Page 12 of 16
TYPICAL APPLICATION CIRCUITS
Q
3.3V
50
Ω
50
Ω
ADCMP572
Q
VIN
VP
VTP
VTN
VN
LATCH
INPUTS
04409-034
VCCI
LATCH
INPUTS
04409-029
V
CCI
V
CCO
Figure 21. Zero-Crossing Detector with 3.3 V CML Outputs
Q
50
Ω
50
Ω
Q
VP
VN
VP
VTP
VTN
VN
VCCO = 3.3V
5V
75
Ω
50
Ω
50
Ω
100
Ω
100
Ω
ADCMP572
Figure 25. Interfacing 3.3 V CML to a 50 Ω
Ground Terminated Instrument
LATCH
INPUTS
04409-030
VCCI = 5.2V
ADCMP572
VCCO
Figure 22. LVDS to 50 Ω Back Terminated RSPECL Receiver
50
Ω
50
Ω
+
Q
VIN
VTH
LATCH
VCCI
VP
VN
VCCO = 3.3V
VCCO
ADCMP572
50
1.35k
50
0
44
09
-0
35
Figure 26. Disabling the ADCMP572 Latch Feature
INPUTS
GND = –1V
04409-031
VCCI = 3.3V
VCCO = 2.5V/3.3V
2.5V/3.3V
ADCMP572
Figure 23. Comparator with ±1 V Input Range and
2.5 V or 3.3 V CML Outputs
50
Ω
50
Ω
Q
VIN
VTH
VP
VN
500
Ω
04409-048
VCCI = 5.2V = VCCO
VTT = 3.2V
VCCO
ADCMP573
50
Ω
50
Ω
Figure 27. Disabling the ADCMP573 Latch Feature
LATCH
INPUTS
04409-032
VCCI = 5.2V
VCCO = 3.3V/5.2V
3.3V/5.2V
ADCMP572
Figure 24. Comparator with 0 V to 3 V Input Range and
3.3 V or 5.2 V Positive CML Outputs
HYS
VCCO
04409-036
VCCI
ADCMP572
50
Ω
50
Ω
0
Ω TO 5kΩ
Figure 28. Adding Hysteresis Using the HYS Control Pin
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