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參數(shù)資料
| 型號： | EVAL-AD7859CB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 3 V to 5 V Single Supply, 200 kSPS 8-Channel, 12-Bit Sampling ADCs |
| 中文描述： | 3 V至5 V單電源，200 kSPS的8通道，12位采樣ADC |
| 文件頁數(shù)： | 11/28頁 |
| 文件大?。?/td> | 535K |
| 代理商： | EVAL-AD7859CB |
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AD7859/AD7859L
REV. A
–11–
STATUS REGISTER
The arrangement of the status register is shown below. The status register is a read-only register and contains 16 bits of data. The
status register is selected by first writing to the control register and putting two 1s in RDSLT1 and RDSLT0. The function of the
bits in the status register are described below. The power-up status of all bits is 0.
WRITE TO CONTROL REGISTER
SETTING RDSLT0 = RDSLT1 = 1
READ STATUS REGISTER
START
Figure 4. Flowchart for Reading the Status Register
MSB
ZERO
ZERO
SGL/
DIFF
CHSLT2
CHSLT1
CHSLT0
PMGT1
PMGT0
ONE
ONE
AMODE
BUSY
CALMD
CALSLT1
CALSLT0
STCAL
LSB
STATUS REGISTER BIT FUNCTION DESCRIPTION
Bit
Mnemonic
Comment
15
14
13
12
11
10
9
8
7
6
5
ZERO
ZERO
SGL/
DIFF
CHSLT2
CHSLT1
CHSLT0
PMGT1
PMGT0
ONE
ONE
AMODE
These two bits are always 0.
Single/Differential Bit.
Channel Selection Bits. These bits, in conjunction with the SGL/
DIFF
bit, determine which channel has
been selected for conversion. Please refer to Table IIIa and Table IIIb.
Power Management Bits. These bits along with the
SLEEP
pin indicate if the part is in a power-down
mode or not. See Table VI in Power-Down Section for description.
Both these bits are always 1.
Analog Mode Bit. This bit is used along with SGL/DIFF and CHSLT2 – CHSLT0 to determine the
AIN(+) and AIN(–) inputs to the track and hold circuitry and the analog conversion mode (unipolar or bi-
polar). Please see Table III for details.
Conversion/Calibration BUSY Bit. When this bit is a 1, there is a conversion or a calibration in progress.
When this bit is a zero, there is no conversion or calibration in progress.
Calibration Mode Bit. A 0 in this bit indicates a self-calibration is selected, and a 1 in this bit indicates a
system calibration is selected (see Table IV).
Calibration Selection Bits. The CALSLT1 and CALSLT0 bits indicate which of the calibration
registers are addressed for reading and writing (see section on the Calibration Registers for more details).
Start Calibration Bit. The STCAL bit is a 1 if a calibration is in progress and a 0 if there is no calibration in
progress.
4
BUSY
3
CALMD
2
1
0
CALSLT1
CALSLT0
STCAL
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