參數(shù)資料
型號: EVAL-AD7677CB
廠商: Analog Devices, Inc.
英文描述: 16-Bit, 1 LSB INL, 1 MSPS Differential ADC
中文描述: 16位,1 LSB INL和1 MSPS的差分ADC
文件頁數(shù): 5/20頁
文件大?。?/td> 322K
代理商: EVAL-AD7677CB
REV. 0
AD7677
–5–
ORDERING GUIDE
Model
Temperature Range
–40
°
C to +85
°
C
–40
°
C to +85
°
C
Package Description
Package Option
AD7677AST
AD7677ASTRL
EVAL-AD7677CB
1
EVAL-CONTROL BRD2
2
Quad Flatpack (LQFP)
Quad Flatpack (LQFP)
Evaluation Board
Controller Board
ST-48
ST-48
NOTES
1
This board can be used as a stand-alone evaluation board or in conjunction with the EVAL-CONTROL BRD2 for evaluation/
demonstration purposes.
2
This board allows a PC to control and communicate with all Analog Devices evaluation boards ending in the CB designators.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the AD7677 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
Analog Inputs
IN+
2
, IN–
2
, REF, REFGND . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . AVDD + 0.3 V to AGND – 0.3 V
Ground Voltage Differences
AGND, DGND, OGND . . . . . . . . . . . . . . . . . . . . .
±
0.3 V
Supply Voltages
AVDD, DVDD, OVDD . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
AVDD to DVDD,
AVDD to OVDD . . . . . . . . . . . . . .
±
7 V
DVDD to OVDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
7 V
Digital Inputs . . . . . . . . . . . . . . . . . –0.3 V to DVDD + 0.3 V
Internal Power Dissipation
3
. . . . . . . . . . . . . . . . . . . . 700 mW
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
°
C
Storage Temperature Range . . . . . . . . . . . . –65
°
C to +150
°
C
Lead Temperature Range
(Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . .300
°
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2
See Analog Input section.
3
Specification is for device in free air: 48-Lead LQFP:
JA
= 91
°
C/W,
JC
= 30
°
C/W.
TO OUTPUT
PIN
C
L
60pF
1
500 A
I
OH
1.6mA
I
OL
1.4V
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
C
L
OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
Figure 1. Load Circuit for Digital Interface Timing,
SDOUT, SYNC, SCLK Outputs, C
L
= 10 pF
0.8V
2V
2V
0.8V
t
DELAY
2V
0.8V
t
DELAY
Figure 2. Voltage Reference Levels for Timings
Table I. Serial Clock Timings in Master Read after Convert
DIVSCLK[1]
DIVSCLK[0]
0
0
0
1
1
0
1
1
Unit
SYNC to SCLK First Edge Delay Minimum
Internal SCLK Period Minimum
Internal SCLK Period Maximum
Internal SCLK HIGH Minimum
Internal SCLK LOW Minimum
SDOUT Valid Setup Time Minimum
SDOUT Valid Hold Time Minimum
SCLK Last Edge to SYNC Delay Minimum
Busy High Width Maximum (Warp)
Busy High Width Maximum (Normal)
Busy High Width Maximum (Impulse)
t
18
t
19
t
19
t
20
t
21
t
22
t
23
t
24
t
24
t
24
t
24
3
25
40
12
7
4
2
3
1.5
1.75
2
17
50
70
22
21
18
4
60
2
2.25
2.5
17
100
140
50
49
18
30
140
3
3.25
3.5
17
200
280
100
99
18
89
300
5.25
5.55
5.75
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
μ
s
μ
s
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