VREF_IN
參數(shù)資料
型號: EVAL-AD5532HSEBZ
廠商: Analog Devices Inc
文件頁數(shù): 10/12頁
文件大?。?/td> 0K
描述: BOARD EVAL FOR AD5532HS
產(chǎn)品培訓模塊: DAC Architectures
標準包裝: 1
DAC 的數(shù)量: 32
位數(shù): 14
采樣率(每秒): 1.1M
數(shù)據(jù)接口: 串行
設置時間: 10µs
DAC 型: 電壓
工作溫度: -40°C ~ 85°C
已供物品: 板,CD
已用 IC / 零件: AD5532HS
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REV. 0
AD5532HS
–7–
Typical Performance Characteristics–
DAC CODE
D
A
C
ERR
OR
–LSBs
1.0
0
VREF_IN = 2.5V
VOFFS_IN = 0V
TA = 25 C
2K
4K
6K
8K
10K 12K 14K16K
0.8
0.6
0.4
0.2
0.0
–0.2
–0.4
–0.6
–0.8
–1.0
TPC 1. Typical DNL Plot
SINK/SOURCE CURRENT – mA
V
OUT
V
2.535
2.530
2.520
64
20
2.525
TA = 25 C
VREFIN = 2.5V
VOFFS_IN = 0V
DAC LOADED TO MIDSCALE
–2
–4
–6
TPC 4. VOUT Source and Sink
Capability
% FSR
FREQ
UENCY
%
15
10
0
0.1
5
0.2
0.3
TPC 7. INL Error Distribution at 25
°C
DNL
ERR
OR
LSBs
1.0
–40
040
80
0.5
0.0
–0.5
–1.0
INL
ERR
OR
%
FSR
0.2
0.1
0.0
–0.1
–0.2
TEMPERATURE – C
DNL MIN
INL MIN
INL MAX
DNL MAX
TPC 2. INL Error and DNL Error vs.
Temperature
V
OUT
V
–1
1
2
3
4
5
6
0
TA = 25 C
VREFIN = 2.5V
VOFFS_IN = 0V
TIME BASE – 1.25 s/DIV
TPC 5. Full-Scale Settling Time
mV
FREQ
UENCY
%
15
10
0
10
30
5
20
TPC 8. Offset Error Distribution
at 25
°C
TEMPERATURE – C
V
OUT
V
5.000
4.995
4.985
–40
0
40
80
4.990
VREFIN = 2.5V
VOFFS_IN = 0V
DAC LOADED TO FULL SCALE
TPC 3. VOUT vs. Temperature
TIME BASE – 200ns/DIV
V
OUT
V
2.494
2.506
2.508
2.510
2.512
2.514
2.516
2.518
2.520
TA = 25 C
VREFIN = 2.5V
VOFFS_IN = 0V
2.498
2.500
2.502
2.504
2.496
TPC 6. Major Code Transition Glitch
Impulse
% FSR
FREQ
UENCY
%
20
10
0
–1.0
–0.5
0.0
TPC 9. Full-Scale Error Distribution
at 25
°C
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