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參數(shù)資料
| 型號(hào)： | EV0041 |
| 廠商： | Monolithic Power Systems, Inc. |
| 英文描述： | High Current Integrated Half Bridge + Driver |
| 中文描述： | 高電流集成半橋驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 255K |
| 代理商： | EV0041 |
MP8040 – HIGH CURRENT INTEGRATED HALF BRIDGE + DRIVER
MP8040 Rev. 1.5
5/3/2005
www.MonolithicPower.com
4
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
2005 MPS. All Rights Reserved.
TM
PIN FUNCTIONS
Pin #
Name
Description
Driver Logic Input. Drive PWM with the signal that controls the MP8040 output. Drive PWM
high to turn on the high-side switch; drive PWM low to turn on the low-side switch.
Power Supply Input. Connect SP to the positive side of the input power supply. Bypass SP
to GND as close to the IC as possible.
Switched Output. SW is the power output of the MP8040. Connect the output LC filter to
SW. SW is valid approximately 100μs after SP goes high.
Ground. (Note: Connect the exposed pad on the bottom side to Pin 4).
Bootstrap Supply. BS powers the high-side gate of the MP8040. Connect a 0.1μF or
greater capacitor between BS and SW.
Shutdown Input. SHDN enables/disables the MP8040. Drive SHDN low to turn on the
MP8040, drive it high to turn it off. If not used, connect SHDN to GND.
Gate Drive Supply Bypass. The voltage at DRV is supplied from an internal regulator from
SP. DRV powers the internal circuitry and internal MOSFET gate drives. Bypass DRV to
GND with a 0.1μF to 10μF capacitor.
Fault Output. Active-low, open drain. A low output at FLT indicates that the MP8040 has
detected a fault and has shutdown. Connect FLT to DRV through a 100k
resistor.
1
PWM
2
SP
3
SW
4
GND
5
BS
6
SHDN
7
DRV
8
FLT
OPERATION
The MP8040 is a general purpose, power
driver. It takes a logic input and drives a half
bridge comprised of 0.1
high-side and
low-side N-Channel MOSFET switches.
It operates at frequencies up to 1.2MHz, can
accept a DC supply voltage as high as 25V,
and produce peak output current as high as 9A.
HI DRIVE
LO DRIVE
CURRENT
LIMIT &
FEEDBACK
BS
UVLO
THERMAL
SHUTDOWN
UVLO
INTERNAL
5V REG.
LOGIC
D
BS
8
6
1
7
5
2
3
4
DRV
PWM
FLT
SHDN
BS
SP
SW
GND
MP8040_F02
Figure 1—Function Block Diagram
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