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MP8040 – HIGH CURRENT INTEGRATED HALF BRIDGE + DRIVER
MP8040 Rev. 1.5
5/3/2005
www.MonolithicPower.com
2
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
2005 MPS. All Rights Reserved.
TM
PACKAGE REFERENCE
Part Number*
Package
SOIC8N
(Exposed Pad)
Temperature
MP8040DN
–40
°
C to +85
°
C
*
For Tape & Reel, add suffix –Z (eg. MP8040DN–Z)
For Lead Free, add suffix –LF (eg. MP8040DN–LF–Z)
ABSOLUTE MAXIMUM RATINGS
(1)
SP Supply Voltage (V
SP
).............................. 28V
SW Pin Voltage ..............................
–
0.3V to V
SP
SW to BS.......................................
–
0.3V to +6V
Voltage at All Other Pins ...............
–
0.3V to +6V
Storage Temperature ..............
–
55
°
C to +150
°
C
Recommended Operating Conditions
(2)
SP Supply Voltage (V
SP
)..................7.5V to 24V
Peak Output Current......................9A Maximum
Operating Temperature .............
–
40
°
C to +85
°
C
Thermal Resistance
(3)
SOIC8N ..................................50....... 8....
°
C/W
θ
JA
θ
JC
Notes:
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
3) Measured on approximately 1” square of 1 oz copper.
ELECTRICAL CHARACTERISTICS
V
SP
= 12V, V
SHDN
= 0V, T
A
= +25
°
C, unless otherwise noted.
Parameter
Symbol Condition
SP Operating Current
SP Shutdown Current
SHDN, SP Threshold Low
SHDN, SP Threshold High
SHDN, SP Input Bias Current
SW On Resistance
Min
2
Typ
1.5
2.5
1
0.1
9
9
Max
2.5
10
1
1.2
Units
mA
μA
V
V
μA
A
A
MHz
V
SHDN
= 2V
V
SP
= 7.5V, High-Side and Low-Side
V
PWM
= 5, (Sinking)
V
PWM
= 0, (Sourcing)
V
PWM
= 0 to 2V, 50% Duty Cycle
V
SP
= 7.5V, V
PWM
= 2V, C
SW
100nF,
f
SW
= 3.3KHz
V
PWM
= 0 to 5V
V
PWM
= 0 to 2V, High or Low Pulse
V
PWM
= 0 to 5V
SW Current Limit
(4)
SW Switching Frequency
SW Maximum Duty Cycle
(5)
99.5
%
SW Rise/Fall Time
PWM Pulse Width
PWM to SW Delay Time Rising
PWM to SW Delay Time
Falling
Thermal Shutdown
Temperature
20
70
ns
ns
ns
200
V
PWM
= 5 to 0V
70
ns
T
J
Rising, Hysteresis = 20°C
160
°
C
Notes:
4) Guaranteed by design; not production tested.
5) SW drives low for 1.5μs every 300μs to charge the BS to SW capacitor.
PWM
SP
SW
GND
FLT
DRV
SHDN
BS
1
2
3
4
8
7
6
5
TOP VIEW
MP8040_PD01-SOIC8N
EXPOSED PAD
ON BACKSIDE
CONNECT TO PIN 4