參數(shù)資料
型號: EPM7256B
廠商: Altera Corporation
英文描述: Programmable Logic Device Family(MAX7000B可編程邏輯系列器件)
中文描述: 可編程邏輯器件系列(MAX7000B可編程邏輯系列器件)
文件頁數(shù): 34/125頁
文件大小: 1053K
代理商: EPM7256B
34
Altera Corporation
MAX 7000B Programmable Logic Device Family Data Sheet
Preliminary Information
Notes to tables:
(1)
These values are specified under the Recommended Operating Conditions in
Table 12 on page 25
.
(2)
MAX 7000B timing values are preliminary.
(3)
These values are specified for a PIA fan-out of one LAB (16 macrocells). For each additional LAB fan-out in these
devices, add an additional 0.1 ns to the PIA timing value.
(4)
Measured with a 16-bit loadable, enabled, up/ down counter programmed into each LAB.
(5)
The
f
MAX
values represent the highest frequency for pipelined data.
(6)
Operating conditions: V
CCIO
= 2.5
±
5
%
for commercial and industrial use.
(7)
The
t
LPA
parameter must be added to the
t
LAD
,
t
LAC
,
t
IC
,
t
ACL
,
t
CPPW
,
t
EN
, and
t
SEXP
parameters for macrocells
running in low-power mode.
Table 19. Selectable I/O Standard Output Adder Delays
I/O Standard
Speed Grade
Unit
-3
-5
-7
Min
Max
Min
Max
Min
Max
3.3 V TTL/CMOS
2.5 V TTL/CMOS
1.8 V TTL/CMOS
PCI
GTL+
SSTL-3 Class I
SSTL-3 Class II
SSTL-3 Class I
SSTL-3 Class II
0.0
0.2
1.2
0.0
-0.2
-0.1
-0.1
-0.1
-0.1
0.0
0.3
1.7
0.0
-0.3
-0.1
-0.1
-0.1
-0.1
0.0
0.4
2.5
0.0
-0.4
-0.2
-0.2
-0.2
-0.2
ns
ns
ns
ns
ns
ns
ns
ns
ns
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