參數(shù)資料
型號(hào)： EPM7062B
廠商： Altera Corporation
英文描述： Programmable Logic Device Family(MAX7000B可編程邏輯系列器件)
中文描述： 可編程邏輯器件系列（MAX7000B可編程邏輯系列器件）
文件頁數(shù)： 20/125頁
文件大?。?/td> 1053K
代理商： EPM7062B
20
Altera Corporation
MAX 7000B Programmable Logic Device Family Data Sheet
Preliminary Information
Open-Drain Output Option
MAX 7000B devices provide an optional open-drain (equivalent to
open-collector) output for each I/ O pin. This open-drain output enables
the device to provide system-level control signals (e.g., interrupt and
write enable signals) that can be asserted by any of several devices. It can
also provide an additional wired-
OR
plane.
Programmable Ground Pins
Each unused I/ O pin on MAX 7000B devices may be used as an additional
ground pin. This programmable ground feature does not require the use
of the associated macrocell; therefore, the buried macrocell is still
available for user logic.
Slew-Rate Control
The output buffer for each MAX 7000B I/ O pin has an adjustable output
slew rate that can be configured for low-noise or high-speed performance.
A faster slew rate provides high-speed transitions for high-performance
systems. However, these fast transitions may introduce noise transients
into the system. A slow slew rate reduces system noise, but adds a
nominal delay of 4 to 5 ns. When the configuration cell is turned off, the
slew rate is set for low-noise performance. Each I/ O pin has an individual
EEPROM bit that controls the slew rate, allowing designers to specify the
slew rate on a pin-by-pin basis. The slew rate control affects both the
rising and falling edges of the output signal.
Advanced I/O Standard Support
The MAX 7000B I/ O pins support the following I/ O standards: LVTTL,
LVCMOS, 1.8-V I/ O, 2.5-V I/ O, GTL+, SSTL-3 Class I and II, and SSTL-2
Class I and II.
Table 8. MAX 7000B MultiVolt I/O Support
V
CCIO
(V)
Input Signal (V)
Output Signal (V)
1.8
v
v
v
2.5
v
v
v
3.3
v
v
v
5.0
1.8
v
2.5
3.3
5.0
1.8
2.5
v
3.3
v
v
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM7064 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device Family
EPM7064AE 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Programmable Logic Device
EPM7064AEFC100-10 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 64 Macro 68 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7064AEFC100-10N 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 64 Macro 68 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM7064AEFC100-4 功能描述:CPLD - 復(fù)雜可編程邏輯器件 CPLD - MAX 7000 64 Macro 68 IOs RoHS:否 制造商:Lattice 系列: 存儲(chǔ)類型:EEPROM 大電池?cái)?shù)量:128 最大工作頻率:333 MHz 延遲時(shí)間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
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