參數(shù)資料
型號(hào): EPM7032S
廠(chǎng)商: Altera Corporation
英文描述: Programmable Logic Device Family
中文描述: 可編程邏輯器件系列
文件頁(yè)數(shù): 26/60頁(yè)
文件大小: 943K
代理商: EPM7032S
26
Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
Notes to tables:
(1)
See the
Operating Requirements for Altera Devices Data Sheet.
(2)
Minimum DC input voltage is –0.5 V. During transitions, the inputs may undershoot to –2.0 V for input currents
less than 100 mA and periods shorter than 20 ns.
(3)
For EPM7128A and EPM7256A devices only, V
CC
must rise monotonically.
(4)
In MAX 7000AE devices, all pins, including dedicated inputs, I/O pins, and JTAG pins, may be driven before
V
CCINT
and V
CCIO
are powered.
(5)
These devices support in-system programming for –40
°
to 100
°
C. For in-system programming support between
–40
°
and 0
°
C, contact Altera Applications.
(6)
These values are specified under the recommended operating conditions shown in
Table 11 on page 24
.
(7)
The parameter is measured with 50
%
of the outputs each sourcing the specified current. The I
OH
parameter refers
to high-level TTL or CMOS output current.
(8)
The parameter is measured with 50
%
of the outputs each sinking the specified current. The I
OL
parameter refers to
low-level TTL or CMOS output current.
(9)
This value is specified for normal device operation. For MAX 7000AE devices, the maximum leakage current during
power-up is ±300
μ
A. For EPM7128A and EPM7256A devices, leakage current during power-up is not specified.
(10) For EPM7128A and EPM7256A devices, this pull-up exists while a device is programmed in-system.
(11) For MAX 7000AE devices, this pull-up exists while devices are programmed in-system and in unprogrammed
devices during power-up.
(12) Capacitance is measured at 25
°
C and is sample-tested only. The
OE1
pin (high-voltage pin during programming)
has a maximum capacitance of 20 pF.
(13) The POR time for MAX 7000AE devices (except MAX 7128A and MAX 7256A devices) does not exceed 100
μ
s. The
sufficient V
CCINT
voltage level for POR is 3.0 V. The device is fully initialized within the POR time after V
CCINT
reaches the sufficient POR voltage level.
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