參數(shù)資料
型號: EPM2210GF256A5N
廠商: ALTERA CORP
元件分類: PLD
英文描述: FLASH PLD, PBGA256
封裝: 17 X 17 MM, 1 MM PITCH, LEAD FREE, FBGA-256
文件頁數(shù): 68/108頁
文件大?。?/td> 1342K
代理商: EPM2210GF256A5N
4–2
Core Version a.b.c variable
Altera Corporation
MAX II Device Handbook, Volume 1
December 2007
MAX II Hot-Socketing Specifications
Devices Can Be Driven before Power-Up
Signals can be driven into the MAX II device I/O pins and GCLK[3..0]
pins before or during power-up or power-down without damaging the
device. MAX II devices support any power-up or power-down sequence
(VCCIO1, VCCIO2, VCCIO3, VCCIO4, VCCINT), simplifying the system-level
design.
I/O Pins Remain Tri-Stated during Power-Up
A device that does not support hot-socketing may interrupt system
operation or cause contention by driving out before or during power-up.
In a hot socketing situation, the MAX II device’s output buffers are turned
off during system power-up. MAX II devices do not drive out until the
device attains proper operating conditions and is fully configured. Refer
to “Power-On Reset Circuitry” on page 4–6 for information about turn-on
voltages.
Signal Pins Do Not Drive the VCCIO or VCCINT Power Supplies
MAX II devices do not have a current path from I/O pins or GCLK[3..0]
pins to the VCCIO or VCCINT pins before or during power-up. A MAX II
device may be inserted into (or removed from) a system board that was
powered up without damaging or interfering with system-board
operation. When hot socketing, MAX II devices may have a minimal
effect on the signal integrity of the backplane.
AC and DC Specifications
You can power up or power down the VCCIO and VCCINT pins in any
sequence. During hot socketing, the I/O pin capacitance is less than 8 pF.
MAX II devices meet the following hot socketing specifications:
The hot socketing DC specification is: | IIOPIN | < 300 μA.
The hot socketing AC specification is: | IIOPIN | < 8 mA for 10 ns or
less.
1
MAX II devices are immune to latch-up when hot socketing. If
the
TCK JTAG input pin is driven high during hot socketing, the
current on that pin might exceed the specifications above.
IIOPIN is the current at any user I/O pin on the device. The AC
specification applies when the device is being powered up or powered
down. This specification takes into account the pin capacitance but not
board trace and external loading capacitance. Additional capacitance for
trace, connector, and loading must be taken into consideration separately.
The peak current duration due to power-up transients is 10 ns or less.
相關(guān)PDF資料
PDF描述
EPM2210GF324A3N FLASH PLD, PBGA324
EPM2210GF324A4N FLASH PLD, PBGA324
EPM2210GF324A5N FLASH PLD, PBGA324
EPM7064BFC100-3 EE PLD, 3.5 ns, PBGA100
EPM7064BFC100-5 EE PLD, 3.5 ns, PBGA100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EPM2210GF256C3 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX II 1700 Macro 204 IO RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM2210GF256C3N 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX II 1700 Macro 204 IO RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM2210GF256C4 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX II 1700 Macro 204 IO RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM2210GF256C4N 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX II 1700 Macro 204 IO RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100
EPM2210GF256C5 功能描述:CPLD - 復雜可編程邏輯器件 CPLD - MAX II 1700 Macro 204 IO RoHS:否 制造商:Lattice 系列: 存儲類型:EEPROM 大電池數(shù)量:128 最大工作頻率:333 MHz 延遲時間:2.7 ns 可編程輸入/輸出端數(shù)量:64 工作電源電壓:3.3 V 最大工作溫度:+ 90 C 最小工作溫度:0 C 封裝 / 箱體:TQFP-100