Figure 32. ICCACTIVE
參數(shù)資料
型號(hào): EPF10K70RC240-3
廠商: Altera
文件頁數(shù): 29/128頁
文件大?。?/td> 0K
描述: IC FLEX 10K FPGA 70K 240-RQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
產(chǎn)品變化通告: Package Change 30/Jun/2010
標(biāo)準(zhǔn)包裝: 24
系列: FLEX-10K®
LAB/CLB數(shù): 468
邏輯元件/單元數(shù): 3744
RAM 位總計(jì): 18432
輸入/輸出數(shù): 189
門數(shù): 118000
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 240-BFQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 240-RQFP(32x32)
其它名稱: 544-2243
124
Altera Corporation
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Figure 32. ICCACTIVE vs. Operating Frequency (Part 3 of 3)
Configuration &
Operation
The FLEX 10K architecture supports several configuration schemes. This
section summarizes the device operating modes and available device
configuration schemes.
Devices) for detailed descriptions of device configuration options, device
configuration pins, and for information on configuring FLEX 10K devices,
including sample schematics, timing diagrams, and configuration
parameters.
Operating Modes
The FLEX 10K architecture uses SRAM configuration elements that
require configuration data to be loaded every time the circuit powers up.
The process of physically loading the SRAM data into the device is called
configuration. Before configuration, as VCC rises, the device initiates a
Power-On Reset (POR). This POR event clears the device and prepares it
for configuration. The FLEX 10K POR time does not exceed 50
s.
During initialization, which occurs immediately after configuration, the
device resets registers, enables I/O pins, and begins to operate as a logic
device. The I/O pins are tri-stated during power-up, and before and
during configuration. Together, the configuration and initialization
processes are called command mode; normal device operation is called user
mode.
EPF10K250A
0
Frequency (MHz)
3,500
3,000
2,500
2,000
1,500
1,000
500
20
40
60
100
80
ICC Supply
Current (mA)
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