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參數(shù)資料
| 型號(hào)： | EPF10K50V |
| 廠商： | Altera Corporation |
| 英文描述： | Embedded Programmable Logic Family(FLEX10K嵌入式可編程邏輯系列) |
| 中文描述： | 嵌入式可編程邏輯系列（FLEX10K嵌入式可編程邏輯系列） |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大?。?/td> | 103K |
| 代理商： | EPF10K50V |
Power Measurements:
FLEX 10KA vs. XC4000 Devices
T E C H N I C A L B R I E F 4 1
M A R C H 1 9 9 8
M-TB-041-01.01
ALTERA MEGAFUNC TION PARTNERS PROGRAM
Many factors, such as supply voltage, current consumption, die size, and routing structure, affect
semiconductor power consumption. For devices with the same supply voltages, the device current
determines power consumption. Although modeling can be an effective tool for estimating the current
consumption of a particular design, it is not appropriate for comparing the relative current consumption of
the same design in different devices. In addition, modeling current consumption in complex programmable
logic devices (CPLDs) is difficult because many factors need to be considered, including the percentage of
signals switching, channel capacitance, die size, and device utilization.
In the Xilinx application brief
Low Power Benefits of XC4000E/X Overview
(XBRF 002, May 4, 1997),
Xilinx used models to compare the power consumption of its XC4000, XC4000E, XC4000EX, and
XC4000XL devices to the Altera
FLEX
10K and FLEX 10KA devices. The models used a “K” factor, a
device-specific scaling factor used to determine current consumption. However, the models did not provide
an accurate comparison of device power consumption, because the devices were not evaluated under similar
operating conditions. To achieve a fair power consumption comparison, Altera Applications recently
performed lab experiments on Altera’s EPF10K100A and Xilinx’s XC4062XL devices using six typical
designs.
Lab Setup
During the experiment, Altera Applications used a Hewlett-Packard 8110A 150-MHz pulse generator to
generate the clock signals. Each device was mounted on an individual PC board, and the clock was routed
to the device through a terminated connection. All designs had a clock input, one or two control inputs to
set the mode of operation, and one output to verify circuit operation. Because the designs were self-exciting,
the device required no other inputs.
Figure 1
shows the lab setup used in the experiments.
Figure 1. Current Consumption Comparison
Note (1)
Note:
(1)
Current was measured with a Fluke 8840A volt-ohm meter.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EPF10K50VBC3561 | 制造商:XILINX 功能描述:* |
| EPF10K50VBC356-1 | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EPF10K50VBC356-1N | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EPF10K50VBC3562 | 制造商:ALTERA 功能描述:* |
| EPF10K50VBC356-2 | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Flex 10K 360 LABs 274 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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