參數(shù)資料
型號(hào): EP7312-IV-C
廠商: Cirrus Logic, Inc.
英文描述: HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
中文描述: 高性能,低功率系統(tǒng),片上內(nèi)存和增強(qiáng)的數(shù)字音頻接口
文件頁(yè)數(shù): 22/64頁(yè)
文件大?。?/td> 1710K
代理商: EP7312-IV-C
22
Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
DS508PP5
EP7312
High-Performance, Low-Power System on Chip
Static Memory Single Read Cycle
Note:
1. The cycle time can be extended by integer multiples of the clock period (22 ns at 45 MHz, 27 ns at 36 MHz, 54 ns at
18.432 MHz, and 77 ns at 13 MHz), by either driving EXPRDY low and/or by programming a number of wait states. EXPRDY is
sampled on the falling edge of EXPCLK before the data transfer. If low at this point, the transfer is delayed by one clock period
where EXPRDY is sampled again. EXPCLK need not be referenced when driving EXPRDY, but is shown for clarity.
2. Address, Halfword, Word, and Write hold state until next cycle.
EXPCLK
nCS
A
nMWE
HALF-
WORD
WORD
D
WRITE
nMOE
t
CSd
t
Ad
t
CSh
t
MOEh
t
Dh
t
Ds
t
HWd
t
WDd
t
WRd
t
MOEd
EXPRDY
t
EXh
t
EXs
Figure 7. Static Memory Single Read Cycle Timing Measurement
相關(guān)PDF資料
PDF描述
EP7312-IB-90 HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312 HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312-CB-90 HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312-IB-C HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312-CB-C HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
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