Copyright Cirrus Logic, Inc. 2011 (All Rights Reserved) 41 EP7312 High-Performance, Low-Power S" />
參數(shù)資料
型號: EP7312-IV-90
廠商: Cirrus Logic Inc
文件頁數(shù): 36/54頁
文件大小: 0K
描述: IC ARM720T MCU 90MHZ 208-LQFP
標準包裝: 36
系列: EP7
核心處理器: ARM7
芯體尺寸: 32-位
速度: 90MHz
連通性: 編解碼器,DAI,EBI/EMI,IrDA,鍵盤,SPI/Microwire1,UART/USART
外圍設(shè)備: LCD,LED,MaverickKey,PWM
輸入/輸出數(shù): 27
程序存儲器類型: ROMless
RAM 容量: 56K x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 2.7 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 208-LQFP
包裝: 托盤
配用: 598-1209-ND - KIT DEVELOPMENT EP73XX ARM7
其它名稱: 598-1246
DS508F2
Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved)
41
EP7312
High-Performance, Low-Power System on Chip
C14
VSSIO
Pad ground
I/O ground
C15
nPOR
Schmitt
I
Power-on reset input
C16
nEXTPWR
I
External power supply sense input
D1
WRITE/nSDRAS
1
Low
O
Transfer direction / SDRAM RAS signal output
D2
EXPRDY
1
I
Expansion port ready input
D3
VSSIO
Pad ground
I/O ground
D4
VDDIO
Pad power
Digital I/O power, 3.3V
D5
nCS[2]
1
High
O
Chip select 2
D6
nMWE/nSDWE
1
High
O
ROM, expansion write enable/ SDRAM write enable control signal
D7
nSDCS[0]
1
High
O
SDRAM chip select 2
D8
CL[2]
1
Low
O
LCD pixel clock out
D9
VSSRTC
Core ground
Real time clock ground
D10
D[4]
1
Low
I/O
Data I/O
D11
nPWRFL
I
Power fail sense input
D12
MOSCIN
I
Main oscillator input
D13
VDDIO
Pad power
Digital I/O power, 3.3V
D14
VSSIO
Pad ground
I/O ground
D15
D[7]
1
Low
I/O
Data I/O
D16
D[8]
1
Low
I/O
Data I/O
E1
RXD[2]
I
UART 2 receive data input
E2
PB[7]
1
Input
IGPIO port B
E3
TDI
with p/u*
I
JTAG data input
E4
WORD
1
Low
O
Word access select output
E5
VSSIO
Pad ground
I/O ground
E6
nCS[0]
1
High
O
Chip select 0
E7
SDQM[2]
2
Low
O
SDRAM byte lane mask
E8
FRM
1
Low
O
LCD frame synchronization pulse
E9
A[0]
2
Low
O
System byte address
E10
D[5]
1
Low
I/O
Data I/O
E11
VSSOSC
Oscillator ground
PLL ground
E12
VSSIO
Pad ground
I/O ground
E13
nMEDCHG/nBROM
I
Media change interrupt input / internal ROM boot enable
E14
VDDIO
Pad power
Digital I/O power, 3.3V
E15
D[9]
1
Low
I/O
Data I/O
E16
D[10]
1
Low
I/O
Data I/O
F1
PB[5]
1
Input
IGPIO port B
F2
PB[3]
1
Input
IGPIO port B
F3
VSSIO
Pad ground
I/O ground
F4
TXD[2]
1
High
O
UART 2 transmit data output
F5
RUN/CLKEN
1
Low
O
Run output / clock enable output
F6
VSSIO
Pad ground
I/O ground
F7
SDCKE
2
Low
O
SDRAM clock enable output
F8
DD[3]
1
Low
O
LCD serial display data
F9
A[1]
2
Low
O
System byte address
F10
D[6]
1
Low
I/O
Data I/O
F11
VSSRTC
RTC ground
Real time clock ground
F12
BATOK
I
Battery OK input
Table 21. 256-Ball PBGA Ball Listing (Continued)
Ball Location
Name
Strength
Reset
State
Type
Description
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參數(shù)描述
EP7312-IV-C 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312-IVZ 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic
EP7312M-CBZ 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic
EP7312M-CVZ 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic
EP7312M-CVZ-90 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic