Copyright Cirrus Logic, Inc. 2011 (All Rights Reserved) DS508F2 EP7312 High-Performance, Low-Power S" />
參數(shù)資料
型號: EP7312-IV-90
廠商: Cirrus Logic Inc
文件頁數(shù): 30/54頁
文件大?。?/td> 0K
描述: IC ARM720T MCU 90MHZ 208-LQFP
標(biāo)準(zhǔn)包裝: 36
系列: EP7
核心處理器: ARM7
芯體尺寸: 32-位
速度: 90MHz
連通性: 編解碼器,DAI,EBI/EMI,IrDA,鍵盤,SPI/Microwire1,UART/USART
外圍設(shè)備: LCD,LED,MaverickKey,PWM
輸入/輸出數(shù): 27
程序存儲器類型: ROMless
RAM 容量: 56K x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 2.7 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 208-LQFP
包裝: 托盤
配用: 598-1209-ND - KIT DEVELOPMENT EP73XX ARM7
其它名稱: 598-1246
36
Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved)
DS508F2
EP7312
High-Performance, Low-Power System on Chip
161
WAKEUP
Schmitt
I
System wake up input
162
nPWRFL
I
Power fail sense input
163
A[6]
1
Low
O
System byte address
164
D[6]
1
Low
I/O
Data I/O
165
A[5]
1
Low
Out
System byte address
166
D[5]
1
Low
I/O
Data I/O
167
VDDIO
Pad Pwr
Digital I/O power, 3.3 V
168
VSSIO
Pad Gnd
I/O ground
169
A[4]
1
Low
O
System byte address
170
D[4]
1
Low
I/O
Data I/O
171
A[3]
2
Low
O
System byte address
172
D[3]
1
Low
I/O
Data I/O
173
A[2]
2
Low
O
System byte address
174
VSSIO
Pad Gnd
I/O ground
175
D[2]
1
Low
I/O
Data I/O
176
A[1]
2
Low
O
System byte address
177
D[1]
1
Low
I/O
Data I/O
178
A[0]
2
Low
O
System byte address
179
D[0]
1
Low
I/O
Data I/O
180
VSSCORE
Core ground
181
VDDCORE
Core Pwr
Core power, 2.5 V
182
VSSIO
Pad ground
I/O ground
183
VDDIO
Pad Power
Digital I/O power, 3.3 V
184
CL[2]
1
Low
O
LCD pixel clock out
185
CL[1]
1
Low
O
LCD line clock
186
FRM
1
Low
O
LCD frame synchronization
pulse
187
M
1
Low
O
LCD AC bias drive
188
DD[3]
1
Low
I/O
LCD serial display data
189
DD[2]
1
Low
I/O
LCD serial display data
190
VSSIO
Pad Gnd
I/O ground
191
DD[1]
1
Low
I/O
LCD serial display data
192
DD[0]
1
Low
I/O
LCD serial display data
193
nSDCS[1]
1
High
O
SDRAM chip select 1
194
nSDCS[0]
1
High
O
SDRAM chip select 0
195
SDQM[3]
2
Low
I/O
SDRAM byte lane mask
196
SDQM[2]
2
Low
I/O
SDRAM byte lane mask
197
VDDIO
Pad Pwr
Digital I/O power, 3.3 V
198
VSSIO
Pad Gnd
I/O ground
199
SDCKE
2
Low
I/O
SDRAM clock enable output
200
SDCLK
2
Low
I/O
SDRAM clock out
201
nMWE/nSDWE
1
High
O
ROM, expansion write
enable/ SDRAM write enable
control signal
202
nMOE/nSDCAS
1
High
O
ROM, expansion OP
enable/SDRAM CAS control
signal
203
VSSIO
Pad Gnd
I/O ground
204
nCS[0]
1
High
O
Chip select 0
205
nCS[1]
1
High
O
Chip select 1
Table 20. 208-Pin LQFP Numeric Pin Listing (Continued)
Pin
No.
Signal
Strength
Reset
State
Type
Description
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EP7312-IV-C 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312-IVZ 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic
EP7312M-CBZ 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic
EP7312M-CVZ 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic
EP7312M-CVZ-90 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic