參數(shù)資料
型號: EP7312-IB-90
廠商: CIRRUS LOGIC INC
元件分類: 微控制器/微處理器
英文描述: HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
中文描述: 32-BIT, FLASH, 90 MHz, RISC MICROCONTROLLER, PBGA256
封裝: 17 X 17 MM, 1.61 MM HEIGHT, PLASTIC, MO-151, BGA-256
文件頁數(shù): 56/64頁
文件大?。?/td> 1710K
代理商: EP7312-IB-90
56
Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
DS508PP5
EP7312
High-Performance, Low-Power System on Chip
56
V5
R3
PD[4]
I/O
98
59
Y5
T4
PD[3]
I/O
101
60
V6
N6
PD[2]
I/O
104
61
W6
R4
PD[1]
I/O
107
62
Y6
L7
PD[0]/LEDFLSH
O
110
68
W8
T6
SSIRXFR
I/O
122
69
Y8
K8
ADCIN
I
125
70
V9
R6
nADCCS
O
126
75
W10
M8
DRIVE1
I/O
128
76
Y10
T8
DRIVE0
I/O
131
77
V11
N8
ADCCLK
O
134
78
W11
R8
ADCOUT
O
136
79
Y11
N9
SMPCLK
O
138
80
Y12
T9
FB1
I
140
82
Y11
M9
FB0
I
141
83
Y12
R9
COL7
O
142
84
Y13
L9
COL6
O
144
85
W13
T10
COL5
O
146
86
V13
K9
COL4
O
148
87
Y14
R10
COL3
O
150
88
W14
N10
COL2
O
152
91
Y15
R11
COL1
O
154
92
W15
M10
COL0
O
156
93
V15
T12
BUZ
O
158
94
Y16
L10
D[31]
I/O
160
95
W16
R12
D[30]
I/O
163
96
V16
N11
D[29]
I/O
166
97
Y17
T13
D[28]
I/O
169
99
Y16
R13
A[27]/DRA[0]
Out
172
100
Y18
M11
D[27]
I/O
174
101
V17
T14
A[26]/DRA[1]
O
177
102
W18
N12
D[26]
I/O
179
103
Y19
R14
A[25]/DRA[2]
O
182
104
Y20
T15
D[25]
I/O
184
105
U18
N13
HALFWORD
O
187
106
V209
R16
A[24]/DRA[3]
O
189
109
U19
P15
D[24]
I/O
191
110
U20
M13
A[23]/DRA[4]
O
194
Table 23. JTAG Boundary Scan Signal Ordering (Continued)
LQFP
Pin No.
TFBGA
Ball
PBGA
Ball
Signal
Type
Position
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