參數(shù)資料
型號: EP7312-IB-90
廠商: CIRRUS LOGIC INC
元件分類: 微控制器/微處理器
英文描述: HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
中文描述: 32-BIT, FLASH, 90 MHz, RISC MICROCONTROLLER, PBGA256
封裝: 17 X 17 MM, 1.61 MM HEIGHT, PLASTIC, MO-151, BGA-256
文件頁數(shù): 14/64頁
文件大?。?/td> 1710K
代理商: EP7312-IB-90
14
Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
DS508PP5
EP7312
High-Performance, Low-Power System on Chip
Note:
1) Total power consumption = IDD
CORE
x 2.5 V + IDD
IO
x 3.3 V
2) A typical design will provide 3.3 V to the I/O supply (i.e., V
DDIO
), and 2.5 V to the remaining logic. This is to allow the I/O to be
compatible with 3.3 V powered external logic (i.e., 3.3 V SDRAMs).
2) Pull-up current = 50 μA typical at V
DD
= 3.3 V.
COUT
Output capacitance
8
-
10.0
pF
CI/O
Transceiver capacitance
8
-
10.0
pF
IDD
STANDBY
@ 25 C
Standby current consumption
1
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
-
-
77
41
-
-
μA
Only nPOR, nPWRFAIL,
nURESET, PE0, PE1, and RTS
are driven, while all other float,
VIH = V
DD
± 0.1 V,
VIL = GND ± 0.1 V
IDD
STANDBY
@ 70 C
Standby current consumption
1
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
-
-
-
-
570
111
μA
Only nPOR, nPWRFAIL,
nURESET, PE0, PE1, and RTS
are driven, while all other float,
VIH = V
DD
± 0.1 V,
VIL = GND ± 0.1 V
IDD
STANDBY
@ 85 C
Standby current consumption
1
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
-
-
-
-
1693
163
μA
Only nPOR, nPWRFAIL,
nURESET, PE0, PE1, and RTS
are driven, while all other float,
VIH = V
DD
± 0.1 V,
VIL = GND ± 0.1 V
IDD
idle
at 74 MHz
Idle current consumption
1
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
-
-
6
10
-
-
mA
Both oscillators running, CPU
static, Cache enabled, LCD
disabled, VIH = V
DD
± 0.1 V, VIL
= GND ± 0.1 V
IDD
IDLE
at 90 MHz
Idle current consumption
1
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
-
-
7
11
-
-
mA
Both oscillators running, CPU
static, Cache enabled, LCD
disabled, VIH = V
DD
± 0.1 V, VIL
= GND ± 0.1 V
VDD
STANDBY
Standby supply voltage
2.0
-
-
V
Minimum standby voltage for
state retention, internal SRAM
cache, and RTC operation only
a.
b.
c.
Refer to the strength column in the pin assignment tables for all package types.
Assumes buffer has no pull-up or pull-down resistors.
The leakage value given assumes that the pin is configured as an input pin but is not currently being driven.
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
相關PDF資料
PDF描述
EP7312 HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
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