參數(shù)資料
型號(hào): EP7309-CR-C
廠商: CIRRUS LOGIC INC
元件分類: 微控制器/微處理器
英文描述: HIGH PERFORMANCE LOW POWER SYSTEM ON CHIP ENHANCED DIGITAL AUDIO INTERFACE
中文描述: 32-BIT, FLASH, 74 MHz, RISC MICROCONTROLLER, PBGA204
封裝: 13 X 13 MM, TFBGA-204
文件頁數(shù): 10/46頁
文件大?。?/td> 1893K
代理商: EP7309-CR-C
10
Copyright 2001 Cirrus Logic (All Rights Reserved)
DS507PP1
EP7309
High-Performance, Low-Power System on Chip
Note:
1) All power dissipation values can be derived from taking the particular IDD current and multiplying by 2.5 V.
2) The RTC of the EP7309 should be brought up at room temperature. This is required because the RTC OSC will NOT function
properly if it is brought up at –40
°
C. Once operational, it will continue to operate down to –20
°
C extended and 0
°
C
commercial.
3) A typical design will provide 3.3 V to the I/O supply (i.e., V
DD
IO), and 2.5 V to the remaining logic. This is to allow the I/O to be
compatible with 3.3 V powered external logic.
4) Pull-up current = 50 μA typical at V
DD
= 3.3 V.
COUT
Output capacitance
8
10.0
pF
CI/O
Transceiver capacitance
8
10.0
pF
IDD
standby
Standby current consumption
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
TBD
TBD
300
μA
Only 32 kHz oscillator running,
Cache disabled, all other I/O
static, VIH = V
DD
± 0.1 V,
VIL = GND ± 0.1 V
IDD
idle
Idle current consumption
Core, Osc, RTC @2.5 V
I/O @ 2.5 V
TBD
TBD
4.2
mA
Both oscillators running, CPU
static, Cache disabled, LCD
refresh active, VIH = V
DD
± 0.1 V,
VIL = GND ± 0.1 V
At 13 MHz
IDD
operatin
Operating current consumption
Core, Osc, RTC @2.5 V
I/O @ 3.3 V
TBD
TBD
mA
All system active, running typical
program, cache disabled, and
LCD inactive
V
DDstandby
Standby supply voltage
TBD
V
Minimum standby voltage for
state retention and RTC
operation only
a.
b.
c.
See
Table S on page 23
.
Assumes buffer has no pull-up or pull-down resistors.
The leakage value given assumes that the pin is configured as an input pin but is not currently being driven.
Symbol
Parameter
Min
Typ
Max
Unit
Conditions
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