參數(shù)資料
型號： EP2AGX95EF29I3
廠商： Altera
文件頁數(shù)： 50/90頁
文件大?。?/td> 0K
描述： IC ARRIA II GX FPGA 95K 780FBGA
標準包裝： 4
系列： Arria II GX
LAB/CLB數(shù)： 3747
邏輯元件/單元數(shù)： 89178
RAM 位總計： 6839296
輸入/輸出數(shù)： 372
電源電壓： 0.87 V ~ 0.93 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 780-BBGA
供應(yīng)商設(shè)備封裝： 780-FBGA（29x29）
1–46
Chapter 1: Device Datasheet for Arria II Devices
Switching Characteristics
December 2013
Altera Corporation
Table 1–41 lists the transceiver jitter specifications for all supported protocols for
Arria II GZ devices.
Sinusoidal jitter
tolerance at
3072 Mbps
Jitter frequency =
21.8 KHz
Pattern = CJPAT
> 8.5
UI
Jitter frequency =
1843.2 KHz to 20
MHz
Pattern = CJPAT
> 0.1
UI
Notes to Table 1–40:
(1) Dedicated refclk pins are used to drive the input reference clocks. The jitter numbers are valid for the stated conditions only.
(2) The jitter numbers for SONET/SDH are compliant to the GR-253-CORE Issue 3 Specification.
(3) The jitter numbers for XAUI are compliant to the IEEE802.3ae-2002 Specification.
(4) The jitter numbers for PCIe are compliant to the PCIe Base Specification 2.0.
(5) The jitter numbers for SRIO are compliant to the RapidIO Specification 1.3.
(6) The jitter numbers for GIGE are compliant to the IEEE802.3-2002 Specification.
(7) The jitter numbers for HiGig are compliant to the IEEE802.3ae-2002 Specification.
(8) The HD-SDI and 3G-SDI jitter numbers are compliant to the SMPTE292M and SMPTE424M Specifications.
(9) Arria II PCIe receivers are compliant to this specification provided the VTX_CM-DC-ACTIVEIDLE-DELTA of the upstream transmitter is less than 50 mV.
(10) The jitter numbers for Serial Advanced Technology Attachment (SATA) are compliant to the Serial ATA Revision 3.0 Specification.
(11) The jitter numbers for Common Public Radio Interface (CPRI) are compliant to the CPRI Specification V3.0.
(12) The jitter numbers for Open Base Station Architecture Initiative (OBSAI) are compliant to the OBSAI RP3 Specification V4.1.
Table 1–40. Transceiver Block Jitter Specifications for Arria II GX Devices (Note 1) (Part 10 of 10)
Symbol/
Description
Conditions
I3
C4
C5, I5
C6
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Table 1–41. Transceiver Block Jitter Specifications for Arria II GZ Devices (Note 1), (2) (Part 1 of 7)
Symbol/
Description
Conditions
–C3 and –I3
–C4 and –I4
Unit
Min
Typ
Max
Min
Typ
Max
SONET/SDH Transmit Jitter Generation (3)
Peak-to-peak jitter at
622.08 Mbps
Pattern = PRBS15
—
0.1
—
0.1
UI
RMS jitter at 622.08 Mbps
Pattern = PRBS15
—
0.01
—
0.01
UI
Peak-to-peak jitter at 2488.32
Mbps
Pattern = PRBS15
—
0.1
—
0.1
UI
RMS jitter at 2488.32 Mbps
Pattern = PRBS15
—
0.01
—
0.01
UI
SONET/SDH Receiver Jitter Tolerance (3)
Jitter tolerance at 622.08 Mbps
Jitter frequency = 0.03 KHz
Pattern = PRBS15
> 15
UI
Jitter frequency =
25 KHZ
Pattern = PRBS15
> 1.5
UI
Jitter frequency = 250 KHz
Pattern = PRBS15
> 0.15
UI
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP2AGX95EF29I3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 3747 LABs 372 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX95EF29I5 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 3747 LABs 372 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX95EF29I5N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 3747 LABs 372 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX95EF35C4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 3747 LABs 452 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX95EF35C4N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 3747 LABs 452 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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