參數(shù)資料
型號: EP20K300EQC240-3
廠商: Altera
文件頁數(shù): 40/117頁
文件大?。?/td> 0K
描述: IC APEX 20KE FPGA 300K 240-PQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 24
系列: APEX-20K®
LAB/CLB數(shù): 1152
邏輯元件/單元數(shù): 11520
RAM 位總計(jì): 147456
輸入/輸出數(shù): 152
門數(shù): 728000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 240-BFQFP
供應(yīng)商設(shè)備封裝: 240-PQFP(32x32)
Altera Corporation
29
APEX 20K Programmable Logic Device Family Data Sheet
Figure 16. APEX 20K Parallel Expanders
Embedded
System Block
The ESB can implement various types of memory blocks, including
dual-port RAM, ROM, FIFO, and CAM blocks. The ESB includes input
and output registers; the input registers synchronize writes, and the
output registers can pipeline designs to improve system performance. The
ESB offers a dual-port mode, which supports simultaneous reads and
writes at two different clock frequencies. Figure 17 shows the ESB block
diagram.
Figure 17. ESB Block Diagram
32 Signals from
Local Interconnect
To Next
Macrocell
From
Previous
Macrocell
Product-
Term
Select
Matrix
Product-
Term
Select
Matrix
Macrocell
Product-
Term Logic
Macrocell
Product-
Term Logic
Parallel
Expander Switch
Parallel
Expander Switch
wraddress[]
data[]
wren
inclock
inclocken
inaclr
rdaddress[]
q[]
rden
outclock
outclocken
outaclr
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