Note to Figure 32: (" />
參數(shù)資料
型號: EP20K100EQI240-2X
廠商: Altera
文件頁數(shù): 73/117頁
文件大?。?/td> 0K
描述: IC APEX 20KE FPGA 100K 240-PQFP
標準包裝: 24
系列: APEX-20K®
LAB/CLB數(shù): 416
邏輯元件/單元數(shù): 4160
RAM 位總計: 53248
輸入/輸出數(shù): 183
門數(shù): 263000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 240-BFQFP
供應商設(shè)備封裝: 240-PQFP(32x32)
Altera Corporation
59
APEX 20K Programmable Logic Device Family Data Sheet
Figure 32. APEX 20K AC Test Conditions
Note to Figure 32:
(1)
Power supply transients can affect AC measurements. Simultaneous transitions of
multiple outputs should be avoided for accurate measurement. Threshold tests
must not be performed under AC conditions. Large-amplitude, fast-ground-
current transients normally occur as the device outputs discharge the load
capacitances. When these transients flow through the parasitic inductance between
the device ground pin and the test system ground, significant reductions in
observable noise immunity can result.
Operating
Conditions
Tables 23 through 26 provide information on absolute maximum ratings,
recommended operating conditions, DC operating conditions, and
capacitance for 2.5-V APEX 20K devices.
System
C1 (includes
JIG capacitance)
Device input
rise and fall
times < 3 ns
Device
Output
to Test
Table 23. APEX 20K 5.0-V Tolerant Device Absolute Maximum Ratings
Symbol
Parameter
Conditions
Min
Max
Unit
VCCINT Supply voltage
With respect to ground (3)
–0.5
3.6
V
VCCIO
–0.5
4.6
V
VI
DC input voltage
–2.0
5.75
V
IOUT
DC output current, per pin
–25
25
mA
TSTG
Storage temperature
No bias
–65
150
° C
TAMB
Ambient temperature
Under bias
–65
135
° C
TJ
Junction temperature
PQFP, RQFP, TQFP, and BGA packages,
under bias
135
° C
Ceramic PGA packages, under bias
150
° C
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