參數(shù)資料
型號: EN5365QI
廠商: ENPIRION INC
元件分類: 穩(wěn)壓器
中文描述: SWITCHING REGULATOR, 5000 kHz SWITCHING FREQ-MAX, QCC58
封裝: HALOGEN FREE AND ROHS COMPLIANT, QFN-58
文件頁數(shù): 3/17頁
文件大小: 825K
代理商: EN5365QI
03816
9/18/2009
Rev:B
EN5365QI
Enpirion 2009 all rights reserved, E&OE
www.enpirion.com
Table 3. Recommended output capacitors.
Description
MFG
P/N
22uF, 6.3V, 10%
X5R, 1206
(3 capacitors needed)
Murata
Taiyo Yuden
GRM31CR60J226KE19L
JMK316BJ226KL-T
47uF, 10V, 10%
X5R, 1210
47uF, 6.3V, 10%
X5R, 1210
(1 capacitor needed)
Murata
AVX
GRM32ER61A476KE20L
12106D476KAT2
Output ripple voltage is primarily determined by
the aggregate output capacitor impedance. At
the 5MHz switching frequency output impedance,
denoted as Z, is comprised mainly of effective
series resistance, ESR, and effective series
inductance, ESL:
Z = ESR + ESL.
Placing output capacitors in parallel reduces the
impedance and will hence result in lower ripple
voltage.
n
Total
Z
1
...
1
2
1
+
=
Typical ripple versus capacitor arrangement is
given below:
Output Capacitor
Configuration
Typical Output Ripple (mVp-p)
(as measured on EN5365QI
Evaluation Board)
1 x 47uF
30
3 x 22 uF
15
Compensation
The EN5365 is internally compensated through
the use of a type 3 compensation network and is
optimized for use with about 50F of output
capacitance and will provide excellent loop
bandwidth and transient performance for most
applications. Voltage mode operation provides
high noise immunity at light load.
Further,
Voltage
mode
control
provides
superior
impedance matching to sub 90nm loads.
In some cases modifications to the compensation
may be required. The EN5365QI provides the
capability to modify the control loop to allow for
customization for a given application. For more
information,
contact
Enpirion
Applications
Engineering support.
Enable Operation
The ENABLE pin provides a means to shut down
the device, or enable normal operation. A logic
low will disable the converter and cause it to shut
down. A logic high will enable the converter into
normal operation.
When the ENABLE pin is
asserted high, the device will undergo a normal
soft start.
Soft-Start Operation
The SS pin in conjunction with a small capacitor
between this pin and AGND provides the soft
start function to limit the in-rush current during
start-up. During start-up of the converter the
reference voltage to the error amplifier is
gradually increased to its final level by an internal
current source of typically 10uA charging the soft
start capacitor. The typical soft-start time for the
output to reach regulation voltage, from when
AVIN > VUVLO and Enable crosses its logic high
threshold, is given by:
TSS = CSS * 75K (seconds)
Where the soft-start time TSS is in seconds and
the soft-start capacitance CSS is in Farads.
Typically, a capacitor of around 15 nF is
recommended.
During the soft-start cycle, when the soft-start
capacitor reaches 0.75V, the output has reached
its programmed regulation range. Note that the
soft-start current source will continue to operate,
and during normal operation, the soft-start
capacitor will charge up to a final value of 2.5V.
POK Operation
The POK signal is an open drain signal from the
converter indicating the output voltage is within
the specified range. The POK signal will be a
logic high when the output voltage is within 90% -
120% of the programmed output voltage. If the
11
相關(guān)PDF資料
PDF描述
EN5366QI
ENA2O-D16-R00064 OPTICAL INTREMNETA ENCDES
ENA2O-D16-R0020000256 OPTICAL INTREMNETA ENCDES
ENA2O-D20-L00025 OPTICAL INTREMNETA ENCDES
ENA2O-D20-L00050 OPTICAL INTREMNETA ENCDES
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