參數(shù)資料
型號: EMC2DXV5T5
廠商: ON SEMICONDUCTOR
元件分類: 小信號晶體管
英文描述: Dual Common Base-Collector Bias Resistor Transistors
中文描述: 100 mA, 50 V, 2 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR
封裝: LEAD FREE, CASE 463B-01, 5 PIN
文件頁數(shù): 1/10頁
文件大?。?/td> 72K
代理商: EMC2DXV5T5
Semiconductor Components Industries, LLC, 2003
September, 2003 Rev. 1
1
Publication Order Number:
EMC2DXV5T1/D
EMC2DXV5T1,
EMC5DXV5T1
Preferred Devices
Dual Common
BaseCollector Bias
Resistor Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a baseemitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the EMC5DXV5T1 series,
two complementary BRT devices are housed in the SOT553 package
which is ideal for low power surface mount applications where board
space is at a premium.
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7 inch Tape and Reel
Lead Free
MAXIMUM RATINGS
(T
A
= 25
°
C unless otherwise noted, common for Q
1
and Q
2
, minus sign for Q
1
(PNP) omitted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
V
CBO
V
CEO
I
C
50
Vdc
Collector-Emitter Voltage
50
Vdc
Collector Current
100
mAdc
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol
Max
Unit
Total Device Dissipation
T
A
= 25
°
C
Derate above 25
°
C
P
D
357 (Note 1)
2.9 (Note 1)
mW
mW/
°
C
Thermal Resistance
Junction-to-Ambient
R
JA
350 (Note 1)
°
C/W
Characteristic
(Both Junctions Heated)
Symbol
Max
Unit
Total Device Dissipation
T
A
= 25
°
C
Derate above 25
°
C
P
D
500 (Note 1)
4.0 (Note 1)
mW
mW/
°
C
Thermal Resistance
Junction-to-Ambient
R
JA
250 (Note 1)
°
C/W
Junction and Storage Temperature
T
J
, T
stg
55 to +150
°
C
1. FR4 @ Minimum Pad
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
MARKING
DIAGRAM
Preferred
devices are recommended choices for future use
and best overall value.
4
5
Q1
Q2
R1
R1
R2
R2
3
1
2
http://onsemi.com
SOT553
CASE 463B
xx D
1
5
1
5
xx = Specific Device Code
D
= Date Code
Device
Package
Shipping
ORDERING INFORMATION
EMC2DXV5T1
SOT553
4 mm pitch
4000/Tape & Reel
EMC2DXV5T5
SOT553
2 mm pitch
8000/Tape & Reel
EMC5DXV5T1
SOT553
4 mm pitch
4000/Tape & Reel
EMC5DXV5T5
SOT553
2 mm pitch
8000/Tape & Reel
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