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參數(shù)資料
| 型號： | EM73220 |
| 廠商： | ELAN Microelctronics Corp . |
| 英文描述： | 4-Bit Micro-Controller for Speech Product(帶內(nèi)置語音合成器的4位微控制器) |
| 中文描述： | 4位微語音產(chǎn)品（帶內(nèi)置語音合成器的4位微控制器控制器） |
| 文件頁數(shù)： | 18/34頁 |
| 文件大?。?/td> | 168K |
| 代理商： | EM73220 |
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18
EM73220
4-BIT MICRO-CONTROLLER FOR SPEECH PRODUCT
* This specification are subject to be changed without notice.
7.17.1998
INTERRUPT STRUCTURE
Interrupt controller:
IL0-IL5
: Interrupt latch . Hold all interrupt requests from all interrupt sources. ILr can not be
set by program, but can be reset by program or system reset, so IL only can decide
which interrupt source can be accepted.
MASK0-MASK3
: Except INT0 ,MASK register can promit or inhibit all interrupt sources.
EI
: Enable interrupt Flip-Flop can promit or inhibit all interrupt sources, when inter-
rupt happened, EI is cleared to "0" automatically, after RTI instruction happened,
EI will be set to "1" again .
Priority checker: Check interrupt priority when multiple interrupts happened.
INTERRUPT FUNCTION
The procedure of interrupt operation:
1. Push PC and all flags to stack.
2. Set interrupt entry address into PC.
3. Set SF= 1.
4. Clear EI to inhibit other interrupts happened.
5. Clear the IL for which interrupt source has already be accepted.
6. To excute interrupt subroutine from the interrupt entry address.
7. CPU accept RTI, restore PC and flags from stack . Set EI to accept other interrupt requests.
PROGRAM EXAMPLE: To enable interrupt of "INT0, TRGA"
LDIA #1100B;
EXAE; set mask register "1100B"
EICIL 111111B ; enable interrupt F.F.
Reset by system reset and program
instruction
MASK0 MASK1 MASK1 MASK2 MASK3
IL0
r0
IL1
TBI
r1
IL2
r2
IL3
TRGA
r3
IL4
r4
IL5
INT0
r5
Priority checker
EI
Entry address generator
Interrupt request
Interrupt entry address
Reset by system reset and program
instruction
Set by program instruction
SEI
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