參數(shù)資料
型號: EM4056B6CI2LC
英文描述: ACPI Regulator/Controller for Dual Channel DDR Memory Systems; Temperature Range: 0&degC to 70°C; Package: 28-QFN T&R
中文描述: 模擬雜項
文件頁數(shù): 8/14頁
文件大?。?/td> 108K
代理商: EM4056B6CI2LC
EM4056
Copyright
2002, EM Microelectronic-Marin SA
3
www.emmicroelectronic.com
Absolute Maximum Ratings
Parameter
Symbol
Min.
Max.
Units
Voltage
on
Power
Supply pads
VDD
-0.3
6.0
V
Voltage on other pads
VPAD
VSS - 0.3 VDD+ 0.3
V
Max. AC peak current
induced on COIL1 and
COIL2
ICOIL
- 30
+ 30
mAp
Storage temperature
TSTORE
-55
+125
oC
Operating temperature
TOP
-40
+85
oC
Electrostatic discharge
max. to MIL-STS-883C
method 3015
VESD
1000
V
Stresses above these listed maximum ratings may cause
permanent damages to the device. Exposure beyond
specified operating conditions may affect device reliability
or cause malfunction.
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, anti-static precautions
must be taken as for any other CMOS component. Unless
otherwise specified, proper operation can only occur when
all terminal voltages are kept within the voltage range.
Unused inputs must always be tied to a defined logic
voltage level.
Operating Conditions
Parameter
Symbol Min
Max
Units
Max. AC Voltage on COIL
VCOIL
(Note
1)
Vpp
Max. AC coil current
ICOIL
-10
+10
mAp
Carrier frequency
fCOIL
100
150
kHz
Operating temperature
TOP
-40
+85
oC
Note 1: Defined by forcing 10mA on Coil1-Coil2
Electrical Characteristics
Unless otherwise specified : VDD = 4.0 V, VSS = 0 V, TOP = 25°C, VCOIL = 4.5 Vpp, fCOIL = 125 KHz Sine wave
Parameter
Symbol
Conditions
Min
Typ
Max
Units
Supply voltage (not regulated)
VPOS-REG
(Note1)
V
Supply voltage (regulated)
VDD
VPOS-REG = max (note 1)
3.4
4.3
V
Min. EEPROM Read voltage
VRD
Read mode (note 2)
2.5
V
Min. EEPROM Write voltage
VWR
Write mode
2.5
V
EEPROM Read current
IRD
Read mode
19
25
A
EEPROM Write current
IWR
Write mode
60
80
A
Power check EEPROM write
current
IPWCHK
VDD = 4.0 V
70
95
A
EEPROM pwr check threshold
voltage
VPWCHK
2.52
2.75
3.10
V
EEPROM data endurance
NCY
Erase all / Write all
105cycle
EEPROM retention (note 3)
TRET
TOP = 55
oC after 105 cycles
10
year
Voltage
drop
VCOIL- VSS on
modulator
VON
ICOIL = 100 A
ICOIL = 5 mA
0.50
2.50
V
Resonance capacitor
CCOIL
330
340
350
pF
POR voltage (high)
VPRH
VDD rising
2.0
2.6
V
MONOFLOP delay
TMONO
25
50
85
s
Min. voltage of clock extractor 1
(note 4)
VCLK1min
Vcoil1-coil2 (min for extraction)
4.5
Vpp
Min. voltage of clock extractor 2
(note 5)
VCLK2min
Vcoil1-coil2 (min for extraction)
1.0
Vpp
Note 1:
Max. supply voltage (not regulated) is defined by forcing a DC current 10 mAp in pins COIL1-COIL2
Note 2:
The circuit is not functional under low level POR voltage
Note 4:
Uplink
Note 3:
Based on 1000 hours measurement at 150oC
Note 5:
downlink
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