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參數(shù)資料
| 型號： | EM23C256 |
| 廠商： | ELAN Microelctronics Corp . |
| 英文描述： | High Performance 32K × 8 CMOS ROM(高性能256K位（32K × 8）CMOS ROM) |
| 中文描述： | 高性能32K的× 8的CMOS光盤（高性能256K位（32K的× 8）的CMOS光盤） |
| 文件頁數(shù)： | 4/5頁 |
| 文件大小： | 34K |
| 代理商： | EM23C256 |
* This specification are subject to be changed without notice.
EM23C256 SERIES
32K X 8 CMOS ROM
4
10.22.1997
256P5, 256M5 DC ELECTRICAL CHARACTERISTICS
(V
CC
= 4.5V to 5.5V
T
A
=0~70
°
C)
Parameter
Sym.
Condition
Input “Low” voltage
V
IL
Input “High” voltage
V
IH
Output “Low” voltage
V
OL
I
OL
= 400mA
Output “High” voltage
V
OH
I
OH
= -100mA
Input leakage current
I
LI
V
IN
= 0V to V
CC
Output leakage current
I
LO
V
OUT
=0V to V
CC
Operating current
I
CC
t
RC
= 150ns
Standby current
I
SB
CE = V
IH
CE = V
CC
-0.2V
Input capacitance
C
IN
f = 1MHz,
Output capacitance
C
OUT
t
A
= 25
°
C
Min.
-0.3
2.2
Max.
0.8
Unit
V
V
V
V
μ
A
μ
A
mA
mA
μ
A
pF
pF
Note
V
CC
+0.3
0.4
2.4
10
10
35
2
30
10
10
1
2
Note:
1. CE /OE =V
, OE = V
, outputs open
2. Automatic power down version
AC CHARACTERISTICS
EM23C256P3, EM23C256AP3 (V
CC
= 2.7V to 3.3V,
T
A
=0~70
°
C)
Parameter
Cycle time
Address access time
Output hold after address change
Chip enable access time
Chip select access time
Output enable access time
Output disable delay
Sym.
t
CYC
t
ACC
t
OH
t
CE
t
CS
t
OE
t
DF
Condition
Min.
500
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
500
10
1
3
1,3
2
500
150
150
50
EM23C256P5, EM23C256AP5
(V
CC
= 4.5V to 5.5V,
T
A
=0~70
°
C)
Parameter
Cycle time
Address access time
Output hold after address change
Chip enable access time
Chip select access time
Output enable access time
Output disable delay
Note: 1. Applied to “A” versions (power down) only.
2. Outputs high impedence delay (t
DF
) is measure from either CE or OE going high or CS going inactive,
whichever occurs first.
3. Functions of CS/CS & OE/OE are identical.
Sym.
t
CYC
t
ACC
t
OH
t
CE
t
CS
t
OE
t
DF
Condition
Min.
150
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
150
10
1
3
1,3
2
150
70
70
50
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