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參數(shù)資料
| 型號(hào)： | ELANSC400-100AI |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers |
| 中文描述： | 單芯片，低功耗的PC / AT兼容微控制器 |
| 文件頁(yè)數(shù)： | 69/132頁(yè) |
| 文件大?。?/td> | 2400K |
| 代理商： | ELANSC400-100AI |
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élanSC400 and élanSC410 Microcontrollers Data Sheet
69
LC
O
LCD Panel Line Clock
is activated at the start of every pixel line. It is commonly referred to
by LCD data sheets as CL1 or CP1. This signal is not supported on the élanSC410
microcontroller.
LCD Panel Data bits:
LCDD7–LCDD0 are data bits for the LCD panel interface. When
driving 4-bit single-scan panels, bits 3–0 form a nibble-wide LCD data interface. In dual-scan
panel mode, LCDD3–LCDD0 are the data bits for the top half of the LCD, and LCDD7–
LCDD4 are the data bits for the bottom half of the LCD. When driving 8-bit single-scan panels
(monochrome or color STN), these bits are the 8-bit data interface. These signals are not
supported on the élanSC410 microcontroller.
LCD Panel VDD Voltage Control
is used to control the assertion of the LCD’s V
DD
voltage.
This is provided to be part of the solution in sequencing the panel’s V
DD
, DATA, and V
EE
in
the proper order during panel power-up and power-down to prevent damage to the panel
from CMOS driver latch up. V
DD
is used to power the LCD logic and is usually +5 V or +3 V
DC. This signal is not supported on the élanSC410 microcontroller.
LCD Panel VEE Voltage Control
is used to control the assertion of the LCD’s V
EE
voltage.
This is provided to be part of the solution in sequencing the panel’s V
DD
, DATA, and V
EE
in
the proper order during panel power-up and power-down to prevent damage to the panel
from CMOS driver latch up. V
EE
is the LCD contrast voltage and is either positive or negative
with an amplitude of 15–30 V DC.This signal is not supported on the élanSC410
microcontroller.
LCD Panel AC Modulation
is the AC modulation signal for the LCD. AC modulation causes
the LCD panel drivers to reverse polarity to prevent an internal DC bias from forming on the
panel. This signal is not supported on the élanSC410 microcontroller.
LCD Panel Shift Clock
is the nibble/byte strobe used by the LCD panel to latch a nibble or
byte of incoming data. Commonly referred to by LCD panels as CL2 or CP2. This signal is
not supported on the élanSC410 microcontroller.
LCDD7–LCDD0
O
LVDD
O
LVEE
O
M
O
SCK
O
Boundary Scan Test Interface
BNDSCN_TCK
I
Test Clock
is the boundary-scan input clock that is used to shift serial data patterns in from
BNDSCN_TDI.
Test Data Input
is the serial input stream for boundary-scan input data. This pin has a weak
internal pullup resistor. It is sampled on the rising edge of BNDSCN_TCK. If not driven, this
input is sampled High internally.
Test Data Output
is the serial output stream for boundary-scan result data. It is in the high-
impedance state except when scanning is in progress.
Test Mode Select
is an input for controlling the test access port. This pin has a weak internal
pullup resistor. If it is not driven, it is sampled High internally.
BNDSCN_TDI
I
BNDSCN_TDO
O
TS
I
BNDSCN_TMS
Reset and Power
BBATSEN
A
Backup Battery Sense:
RTC (Real Time Clock) backup battery voltage is sampled on this
pin each time the AV
CC
pin has power applied to it followed by a chip master reset. If this
samples below 2.4 V, the VRT bit (RTC index 0Dh) is cleared until read one time. At this time,
the VRT bit is set until BBATSEN is sampled again. BBATSEN also provides a power-on-
reset signal for the RTC when an RTC backup battery is applied for the first time.
Ground Pins
Reset Input
is an asynchronous hardware reset input equivalent to POWERGOOD in the AT
system architecture.
3.3-V DC Supply Pins
provide power to the discrete logic and I/O pins.
3.3-V Supply Pins
provide power to the analog section of the chip, including the internal
PLLs and integrated oscillator circuit. Extreme care should be taken that this supply voltage
is isolated properly to provide a clean, noise free voltage to the PLLs.
3.3-V DC Supply Pins
provide power to the internal CPU.
3.3-V Supply Pin
provides power to the internal real-time clock and on-board static/
configuration RAM. This pin can be driven independently of all other power pins.
GND
RESET
I
V
CC
V
CC
_A
Analog
V
CC
_CPU
V
CC
_RTC
CPU
RTC
Table 19.
Signal Description Table (Continued)
Signal
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ELANSC400-33AC | Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers |
| ELANSC400-33AI | Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers |
| ELANSC400-66AC | Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers |
| ELANSC400-66AI | Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers |
| ELANSC410-100AC | Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ELANSC400-33AC | 制造商:Advanced Micro Devices 功能描述:MCU 16-Bit/32-Bit Elan CISC ROMLess 3.3V 292-Pin BGA |
| ELANSC400-33AC-REVA3 | 制造商:Advanced Micro Devices 功能描述:MCU 16-Bit/32-Bit Elan CISC ROMLess 3.3V 292-Pin BGA |
| ELANSC400-33AI | 制造商:Advanced Micro Devices 功能描述:MCU 32-bit Elan RISC ROMLess 3.3V 292-Pin BGA |
| ELANSC400-33AIAD | 制造商:Advanced Micro Devices 功能描述: |
| ELANSC400-66AC | 制造商:Advanced Micro Devices 功能描述: |
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