參數(shù)資料
型號: ELANSC400-100AI
廠商: Advanced Micro Devices, Inc.
英文描述: Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers
中文描述: 單芯片,低功耗的PC / AT兼容微控制器
文件頁數(shù): 105/132頁
文件大?。?/td> 2400K
代理商: ELANSC400-100AI
élanSC400 and élanSC410 Microcontrollers Data Sheet
105
Table 38.
ISA Cycles
Symbol
Parameter Description
Notes
33-MHz
External Bus
Min
120
Unit
Max
t1a
Setup, SA, SBHE stable to command assertion, 16-bit I/O,
8-bit I/O, Mem
Setup, SA, SBHE stable to command assertion, 16-bit Mem
Delay, MCS16 stable from SA
Delay, IOCS16 stable from SA
Pulse width, IOW, 8-bit cycle
Pulse width, MEMW, 8-bit cycle
Pulse width, IOR, 8-bit cycle
Pulse width, MEMR, 8-bit cycle
Pulse width, IOW, 16-bit cycle
Pulse width, MEMW, 16-bit cycle
Pulse width, IOR, 16-bit cycle
Pulse width, MEMR, 16-bit cycle
SA, SBHE hold from command deassertion
IOCHRDY delay from IOR, MEMR, IOW, MEMW (8-bit)
IOCHRDY delay from IOR, MEMR, IOW, MEMW (16-bit)
IOR, MEMR, IOW, MEMW delay from IOCHRDY
IOR, MEMR, IOW, MEMW high time (8-bit)
IOR, MEMR, IOW, MEMW high time (16-bit)
Delay, BALE rising from IOR, MEMR, IOW, MEMW deassertion
IOCHRDY pulse width
Setup, SD to write command assertion, 8-bit memory, I/O write and
16-bit I/O write
Setup, SD to write command assertion, 16-bit memory write
Hold, SD from write command deassertion
Data access time, 8-bit read
Data access time, 16-bit I/O read
Data access time, 16-bit memory read
Hold, SD from read command deassertion
Setup, SA, SBHE stable to BALE falling edge
Pulse width, BALE
Setup, AEN high to IOR/IOW assertion
Setup, SA, SBHE stable to command assertion
Hold, DRQ from DACK assertion
Setup, DACK assertion to I/O command assertion
Setup, IOR assertion to MEMW command
Setup, MEMR command assertion to IOW command
Delay, IOCHRDY assertion to command high
Delay, memory command to IOCHRDY deassertion
Hold, command off to DACK off
Hold, read command off from write command off
Hold, AEN from command off
ns
t1b
t2a
t2b
t3a
t3b
t3c
t3d
t3e
t3f
t3g
t3h
t4
t5a
t5b
t6
t7a
t7b
t8
t9
t11a
120
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
102
122
530
530
530
530
165
240
165
240
53
378
66
125
187
125
46
120 ns 15.6
μ
s
33
ns
t11b
t12
t13a
t13b
t13c
t14
t15
t16
t17
t19
t20
t21
t22a
t22b
t23
t24
t25
t26
t27
-29
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
489
132
209
0
61
60
145
102
0
145
235
0
200
125
60
50
60
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