參數(shù)資料
型號: EL5211IYEZ
廠商: Intersil
文件頁數(shù): 4/18頁
文件大?。?/td> 0K
描述: IC OPAMP DUAL R-R 60MHZ 8-HMSOP
標準包裝: 50
放大器類型: 電壓反饋
電路數(shù): 2
輸出類型: 滿擺幅
轉換速率: 75 V/µs
增益帶寬積: 32MHz
-3db帶寬: 60MHz
電流 - 輸入偏壓: 2nA
電壓 - 輸入偏移: 3000µV
電流 - 電源: 5mA
電流 - 輸出 / 通道: 65mA
電壓 - 電源,單路/雙路(±): 4.5 V ~ 16.5 V,±2.25 V ~ 8.25 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-VSSOP,8-MSOP(0.118",3.00mm 寬)裸露焊盤
供應商設備封裝: 8-HMSOP
包裝: 管件
產(chǎn)品目錄頁面: 1233 (CN2011-ZH PDF)
12
FN7119.7
May 7, 2007
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the loads, or:
P
DMAX
ΣiV
[
S
I
SMAX
V
(
S+VOUTi )
I
LOAD i
×
+
×]
=
(EQ. 2)
when sourcing, and:
P
DMAX
ΣiV
[
S
I
SMAX
V
(
OUTiVS- )
I
LOADi
×
+
×]
=
(EQ. 3)
when sinking,
where:
i = 1 to 2 for dual and 1 to 4 for quad
VS = Total supply voltage
ISMAX = Maximum supply current per amplifier
VOUTi = Maximum output voltage of the application
ILOADi = Load current
If we set the two PDMAX equations equal to each other, we
can solve for RLOADi to avoid device overheat. Figures 29
through 36 provide a convenient way to see if the device will
overheat. The maximum safe power dissipation can be
found graphically, based on the package type and the
ambient temperature. By using the previous equation, it is a
simple matter to see if PDMAX exceeds the device's power
derating curves. To ensure proper operation, it is important
to observe the recommended derating curves shown in
Figures 29 through 36.
FIGURE 29. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.9
0.8
0.6
0.4
0.3
0.2
0.1
0.0
0
255075
100
125
AMBIENT TEMPERATURE (°C)
POWER
DIS
S
IP
A
T
ION
(W
)
85
0.7
0.5
694mW
θJA = +144°C/W
HTSSOP14
FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY (4-LAYER) TEST BOARD -
HTSSOP EXPOSED DIEPAD SOLDERED TO
PCB PER JESD51-5
3.5
3.0
2.0
1.0
0.5
0.0
0
255075
100
125
AMBIENT TEMPERATURE (°C)
POWER
DIS
S
IP
A
T
ION
(W)
85
2.632W
2.5
1.5
θJA = +38°C/W
HTSSOP14
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.2
1.0
0.8
0.4
0.2
0.0
025
50
75
100
150
AMBIENT TEMPERATURE (°C)
P
O
WER
DIS
S
IPATION
(W)
1.042W
977mW
893mW
θJA = +140°C/W
TSSOP20
θ
JA = +128°C/W
TSSOP24
θJA = +120°C/W
TSSOP28
125
85
0.6
θJA = +165°C/W
TSSOP14
θ
JA = +148°C/W
TSSOP16
845mW
758mW
FIGURE 31. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1.8
1.6
1.2
0.6
0.4
0.0
0
25
50
75
100
150
AMBIENT TEMPERATURE (°C)
P
O
WER
DIS
S
IPATION
(W)
1.667W
1.471W
1.389W
θJA=+90°C/W
TSSOP20
θJA=+85°C/W
TSSOP24
θJA=+75°C/W
TSSOP28
125
85
0.8
θ
JA=+100°C/W
TSSOP14
θJA=+97°C/W
TSSOP16
1.289W
1.250W
1.4
1.0
0.2
FIGURE 32. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
EL5111, EL5211, EL5411
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