參數(shù)資料
型號(hào)： EFM32TG842F8
廠商： Energy Micro
文件頁(yè)數(shù)： 66/68頁(yè)
文件大?。?/td> 0K
描述： IC MCU 32BIT 8KB FLASH LQFP64
標(biāo)準(zhǔn)包裝： 1,000
系列： Tiny Gecko
核心處理器： ARM? Cortex?-M3
芯體尺寸： 32-位
速度： 32MHz
連通性： I²C，IrDA，智能卡，SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，DMA，I²S，LCD，POR，PWM，WDT
輸入/輸出數(shù)： 53
程序存儲(chǔ)器容量： 8KB（8K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 2K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b，D/A 1x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 帶卷 (TR)
...the world's most energy friendly microcontrollers
2013-06-28 - EFM32TG842FXX - d0072_Rev1.10
7
www.energymicro.com
2.1.26 Liquid Crystal Display Driver (LCD)
The LCD driver is capable of driving a segmented LCD display with up to 8x18 segments. A voltage
boost function enables it to provide the LCD display with higher voltage than the supply voltage for the
device. In addition, an animation feature can run custom animations on the LCD display without any
CPU intervention. The LCD driver can also remain active even in Energy Mode 2 and provides a Frame
Counter interrupt that can wake-up the device on a regular basis for updating data.
2.2 Configuration Summary
The features of the EFM32TG842 is a subset of the feature set described in the EFM32TG Reference
Manual. Table 2.1 (p. 7) describes device specific implementation of the features.
Table 2.1. Configuration Summary
Module
Configuration
Pin Connections
Cortex-M3
Full configuration
NA
DBG
Full configuration
DBG_SWCLK, DBG_SWDIO,
DBG_SWO
MSC
Full configuration
NA
DMA
Full configuration
NA
RMU
Full configuration
NA
EMU
Full configuration
NA
CMU
Full configuration
CMU_OUT0, CMU_OUT1
WDOG
Full configuration
NA
PRS
Full configuration
NA
I2C0
Full configuration
I2C0_SDA, I2C0_SCL
USART0
IrDA
US0_TX, US0_RX. US0_CLK, US0_CS
USART1
I2S
US1_TX, US1_RX, US1_CLK, US1_CS
LEUART0
Full configuration
LEU0_TX, LEU0_RX
TIMER0
Full configuration
TIM0_CC[2:0]
TIMER1
Full configuration
TIM1_CC[2:0]
RTC
Full configuration
NA
LETIMER0
Full configuration
LET0_O[1:0]
PCNT0
16-bit count register
PCNT0_S[1:0]
ACMP0
Full configuration
ACMP0_CH[7:4], ACMP0_O
ACMP1
Full configuration
ACMP1_CH[7:4], ACMP1_O
VCMP
Full configuration
NA
ADC0
Full configuration
ADC0_CH[7:0]
DAC0
Full configuration
DAC0_OUT[0], DAC0_OUTxALT
OPAMP
AES
Full configuration
NA
GPIO
53 pins
Available pins are shown in
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