參數(shù)資料
型號(hào)： EFM32LG332F64
廠商： Energy Micro
文件頁(yè)數(shù)： 44/66頁(yè)
文件大?。?/td> 0K
描述： IC MCU 32BIT 64KB FLASH QFP64
標(biāo)準(zhǔn)包裝： 1,000
系列： Leopard Gecko
核心處理器： ARM? Cortex?-M4
芯體尺寸： 32-位
速度： 48MHz
連通性： I²C，IrDA，智能卡，SPI，UART/USART，USB
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，DMA，POR，PWM，WDT
輸入/輸出數(shù)： 50
程序存儲(chǔ)器容量： 64KB（64K x 8）
程序存儲(chǔ)器類(lèi)型： 閃存
RAM 容量： 32K x 8
電壓 - 電源 (Vcc/Vdd)： 1.85 V ~ 3.8 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b，D/A 2x12b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 帶卷 (TR)
Preliminary
...the world's most energy friendly microcontrollers
2013-06-28 - EFM32LG332FXX - d0111_Rev1.10
49
www.energymicro.com
Alternate
LOCATION
Functionality
0
1
2
3
4
5
6
Description
ADC0_CH2
PD2
Analog to digital converter ADC0, input channel number 2.
ADC0_CH3
PD3
Analog to digital converter ADC0, input channel number 3.
ADC0_CH4
PD4
Analog to digital converter ADC0, input channel number 4.
ADC0_CH5
PD5
Analog to digital converter ADC0, input channel number 5.
ADC0_CH6
PD6
Analog to digital converter ADC0, input channel number 6.
ADC0_CH7
PD7
Analog to digital converter ADC0, input channel number 7.
BOOT_RX
PE11
Bootloader RX
BOOT_TX
PE10
Bootloader TX
BU_VIN
PD8
Battery input for Backup Power Domain
CMU_CLK0
PA2
PD7
Clock Management Unit, clock output number 0.
CMU_CLK1
PA1
PD8
PE12
Clock Management Unit, clock output number 1.
DAC0_N0 /
OPAMP_N0
PC5
Operational Amplifier 0 external negative input.
DAC0_N1 /
OPAMP_N1
PD7
Operational Amplifier 1 external negative input.
DAC0_N2 /
OPAMP_N2
PD3
Operational Amplifier 2 external negative input.
DAC0_OUT0 /
OPAMP_OUT0
PB11
Digital to Analog Converter DAC0_OUT0 /
OPAMP output channel number 0.
DAC0_OUT0ALT /
OPAMP_OUT0ALT
PC0
PC1
PC2
PC3
PD0
Digital to Analog Converter DAC0_OUT0ALT /
OPAMP alternative output for channel 0.
DAC0_OUT1ALT /
OPAMP_OUT1ALT
PD1
Digital to Analog Converter DAC0_OUT1ALT /
OPAMP alternative output for channel 1.
DAC0_OUT2 /
OPAMP_OUT2
PD5
PD0
Digital to Analog Converter DAC0_OUT2 /
OPAMP output channel number 2.
DAC0_P0 /
OPAMP_P0
PC4
Operational Amplifier 0 external positive input.
DAC0_P1 /
OPAMP_P1
PD6
Operational Amplifier 1 external positive input.
DAC0_P2 /
OPAMP_P2
PD4
Operational Amplifier 2 external positive input.
DBG_SWCLK
PF0
Debug-interface Serial Wire clock input.
Note that this function is enabled to pin out of reset, and
has a built-in pull down.
DBG_SWDIO
PF1
Debug-interface Serial Wire data input / output.
Note that this function is enabled to pin out of reset, and
has a built-in pull up.
DBG_SWO
PF2
PD1
PD2
Debug-interface Serial Wire viewer Output.
Note that this function is not enabled after reset, and must
be enabled by software to be used.
ETM_TCLK
PD7
PC6
Embedded Trace Module ETM clock .
ETM_TD0
PD6
PC7
PA2
Embedded Trace Module ETM data 0.
ETM_TD1
PD3
PA3
Embedded Trace Module ETM data 1.
ETM_TD2
PD4
PA4
Embedded Trace Module ETM data 2.
ETM_TD3
PD5
PA5
Embedded Trace Module ETM data 3.
GPIO_EM4WU0
PA0
Pin can be used to wake the system up from EM4
GPIO_EM4WU2
PC9
Pin can be used to wake the system up from EM4
GPIO_EM4WU3
PF1
Pin can be used to wake the system up from EM4
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