參數(shù)資料
型號(hào)： EBE51RD8AGFA-6E-E
廠商： ELPIDA MEMORY INC
元件分類： DRAM
英文描述： 512MB Registered DDR2 SDRAM DIMM (64M words x 72 bits, 1 Rank)
中文描述： 64M X 72 DDR DRAM MODULE, 0.45 ns, DMA240
封裝： ROHS COMPLIANT, DIMM-240
文件頁(yè)數(shù)： 15/22頁(yè)
文件大?。?/td> 190K
代理商： EBE51RD8AGFA-6E-E
EBE51RD8AEFA
Data Sheet E0645E30 (Ver. 3.0)
15
AC Characteristics (TC = 0°C to +85
°
C, VDD, VDDQ = 1.8V ± 0.1V, VSS = 0V)
(DDR2 SDRAM Component Specification)
-5C
-4A
Frequency (Mbps)
533
400
Parameter
Symbol
min.
max.
min.
max.
Unit
Notes
/CAS latency
CL
4
5
3
5
tCK
Active to read or write command delay
tRCD
15
15
ns
Precharge command period
tRP
15
15
ns
Active to active/auto refresh command time
tRC
60
55
ns
DQ output access time from CK, /CK
tAC
500
+500
600
+600
ps
DQS output access time from CK, /CK
tDQSCK
450
+450
500
+500
ps
CK high-level width
tCH
0.45
0.55
0.45
0.55
tCK
CK low-level width
tCL
0.45
min.
(tCL, tCH)
3750
0.55
0.45
min.
(tCL, tCH)
5000
0.55
tCK
CK half period
tHP
ps
Clock cycle time
tCK
8000
8000
ps
DQ and DM input hold time
tDH
225
275
ps
5
DQ and DM input setup time
Control and Address input pulse width for
each input
DQ and DM input pulse width for each input tDIPW
tDS
100
150
ps
4
tIPW
0.6
0.6
tCK
0.35
0.35
tCK
Data-out high-impedance time from CK,/CK tHZ
tAC max.
tAC max.
ps
Data-out low-impedance time from CK,/CK
DQS-DQ skew for DQS and associated DQ
signals
DQ hold skew factor
tLZ
tAC min.
tAC max.
tAC min.
tAC max.
ps
tDQSQ
300
350
ps
tQHS
400
450
ps
DQ/DQS output hold time from DQS
Write command to first DQS latching
transition
DQS input high pulse width
tQH
tHP – tQHS
tHP – tQHS
ps
tDQSS
WL
0.25
WL + 0.25
WL
0.25
WL + 0.25
tCK
tDQSH
0.35
0.35
tCK
DQS input low pulse width
tDQSL
0.35
0.35
tCK
DQS falling edge to CK setup time
tDSS
0.2
0.2
tCK
DQS falling edge hold time from CK
tDSH
0.2
0.2
tCK
Mode register set command cycle time
tMRD
2
2
tCK
Write postamble
tWPST
0.4
0.6
0.4
0.6
tCK
Write preamble
tWPRE
0.35
0.35
tCK
Address and control input hold time
tIH
375
475
ps
5
Address and control input setup time
tIS
250
350
ps
4
Read preamble
tRPRE
0.9
1.1
0.9
1.1
tCK
Read postamble
tRPST
0.4
0.6
0.4
0.6
tCK
Active to precharge command
tRAS
45
70000
40
70000
ns
Active to auto-precharge delay
tRAP
tRCD min.
tRCD min.
ns
相關(guān)PDF資料
PDF描述
EBE51RD8AGFA 512MB Registered DDR2 SDRAM DIMM (64M words x 72 bits, 1 Rank)
EBE51UD8AEFA 512MB Unbuffered DDR2 SDRAM DIMM (64M words x 64 bits, 1 Rank)
EBE51UD8AEFA-4A-E 512MB Unbuffered DDR2 SDRAM DIMM (64M words x 64 bits, 1 Rank)
EBE51UD8AEFA-5C-E 512MB Unbuffered DDR2 SDRAM DIMM (64M words x 64 bits, 1 Rank)
EBE51UD8AEFA-6 Circular Connector; No. of Contacts:23; Series:MS27466; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:17-99 RoHS Compliant: No
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EBE51RD8AJFA 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB Registered DDR2 SDRAM DIMM
EBE51RD8AJFA-4A-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB Registered DDR2 SDRAM DIMM
EBE51RD8AJFA-5C-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB Registered DDR2 SDRAM DIMM
EBE51RD8AJFA-6E-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB Registered DDR2 SDRAM DIMM
EBE51UD8ABFA 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:512MB Unbuffered DDR2 SDRAM DIMM (64M words x 64 bits, 1 Rank)
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